[V16SF (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
V8DF (V4DF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
-;; AVX512VL SF/DF plus 128- and 256-bit SF vector modes
-(define_mode_iterator VF_AVX512VL_VF1_128_256
- [(V16SF "TARGET_AVX512F") (V8SF "TARGET_AVX") V4SF
- (V8DF "TARGET_AVX512F") (V4DF "TARGET_AVX512VL")
- (V2DF "TARGET_AVX512VL")])
+;; AVX512ER SF plus 128- and 256-bit SF vector modes
+(define_mode_iterator VF1_AVX512ER_128_256
+ [(V16SF "TARGET_AVX512ER") (V8SF "TARGET_AVX") V4SF])
(define_mode_iterator VF2_AVX512VL
[V8DF (V4DF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
(set_attr "mode" "<ssescalarmode>")])
(define_expand "rsqrt<mode>2"
- [(set (match_operand:VF_AVX512VL_VF1_128_256 0 "register_operand")
- (unspec:VF_AVX512VL_VF1_128_256
- [(match_operand:VF_AVX512VL_VF1_128_256 1 "vector_operand")]
+ [(set (match_operand:VF1_AVX512ER_128_256 0 "register_operand")
+ (unspec:VF1_AVX512ER_128_256
+ [(match_operand:VF1_AVX512ER_128_256 1 "vector_operand")]
UNSPEC_RSQRT))]
"TARGET_SSE && TARGET_SSE_MATH"
{
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mno-avx512er -march=skylake-avx512" } */
+
+#include <math.h>
+
+double square(double d[3], double rad)
+{
+ double res[3];
+
+ for (int i = 0; i < 3; i++)
+ {
+ res[i] = d[i] * d[i];
+ res[i] *= rad/sqrt(res[i]);
+ }
+
+ return res[0];
+}