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whoops initialise FPRs from GPRs in ISACaller
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 15 May 2021 16:08:01 +0000 (17:08 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 15 May 2021 16:08:01 +0000 (17:08 +0100)
src/openpower/decoder/isa/caller.py patch | blob | history

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index eec3b08fb19e4e2f535c5c9e47d03a0421551d56..6baac55f2a5338608ebdd9264963b72bf7f55b67 100644 (file)
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -523,7 +523,7 @@ class ISACaller:
             initial_svstate = SVP64State(initial_svstate)
         self.svstate = initial_svstate
         self.gpr = GPR(decoder2, self, self.svstate, regfile)
-        self.fpr = GPR(decoder2, self, self.svstate, regfile)
+        self.fpr = GPR(decoder2, self, self.svstate, fpregfile)
         self.spr = SPR(decoder2, initial_sprs) # initialise SPRs before MMU
         self.mem = Mem(row_bytes=8, initial_mem=initial_mem)
         self.imem = Mem(row_bytes=4, initial_mem=initial_insns)