* tconfig.in: New file.

	* interp.c (sim_open): Handle missing arg to -E.

diff --git a/sim/sh/.Sanitize b/sim/sh/.Sanitize
index 4b62874c66ef0ea3b41e5a1788351179502e55ae..0c6c23f180d8d3c4ae341ac9c20e7a61c6822bfb 100644 (file)
--- a/sim/sh/.Sanitize
+++ b/sim/sh/.Sanitize
@@ -33,6 +33,7 @@ configure.in
 interp.c
 gencode.c
 syscall.h
+tconfig.in
 
 Things-to-lose:
 

diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index c83d7f6473f0702699bfdbefe84438e8137059a1..dd0444f563f7f57051620e27ae972dad4035e0e4 100644 (file)
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,8 @@
+Wed Apr 23 17:55:22 1997  Doug Evans  <dje@canuck.cygnus.com>
+
+       * tconfig.in: New file.
+       * interp.c (sim_open): Handle missing arg to -E.
+
 Tue Apr 22 08:55:35 1997  Stu Grossman  (grossman@critters.cygnus.com)
 
        * Makefile.in:  Add clean targets.

diff --git a/sim/sh/tconfig.in b/sim/sh/tconfig.in
new file mode 100644 (file)
index 0000000..c5ec4fa
--- /dev/null
+++ b/sim/sh/tconfig.in
@@ -0,0 +1,17 @@
+/* sh target config file */
+
+/* Define this if the simulator supports profiling.
+   See the mips simulator for an example.
+   This enables the `-p foo' and `-s bar' options.
+   The target is required to provide sim_set_profile{,_size}.  */
+/* #define SIM_HAVE_PROFILE */
+
+/* Define this if the simulator uses an instruction cache.
+   See the h8/300 simulator for an example.
+   This enables the `-c size' option to set the size of the cache.
+   The target is required to provide sim_set_simcache_size.  */
+/* #define SIM_HAVE_SIMCACHE */
+
+/* Define this if the target cpu is bi-endian
+   and the simulator supports it.  */
+#define SIM_HAVE_BIENDIAN