cores/frequency_meter: allow passing clk to be measured as a parameter

diff --git a/litex/soc/cores/frequency_meter.py b/litex/soc/cores/frequency_meter.py
index 3e6159ee2f58fe31c998619819e953b27fd651d7..522de1fdd89d91ce4f9db524084186a2da9efad9 100644 (file)
--- a/litex/soc/cores/frequency_meter.py
+++ b/litex/soc/cores/frequency_meter.py
@@ -32,8 +32,8 @@ class Sampler(Module):
 
 
 class FrequencyMeter(Module, AutoCSR):
-    def __init__(self, period, width=6):
-        self.clk = Signal()
+    def __init__(self, period, width=6, clk=None):
+        self.clk = Signal() if clk is None else clk
         self.value = CSRStatus(32)
 
         # # #