fix span issue with really old ddx and non-tcl r100 chips

diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 05107dd2ada5e63991793aa3acf246ada1d4e6de..5f32dd575e3e9494ddc89c0ec2a29c2cb281a93c 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -900,7 +900,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->depthHasSurface = (sPriv->ddx_version.major > 4) ||
       /* these chips don't use tiled z without hyperz. So always pretend
          we have set up a surface which will cause linear reads/writes */
-      ((screen->chip_family & RADEON_CLASS_R100) &&
+      (IS_R100_CLASS(screen) &&
       !(screen->chip_flags & RADEON_CHIPSET_TCL));
 
    if ( dri_priv->textureSize == 0 ) {