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arch-arm: Enable PMSELR_EL0 read in PMU
author
Giacomo Travaglini
<giacomo.travaglini@arm.com>
Tue, 9 Apr 2019 08:30:43 +0000
(09:30 +0100)
committer
Giacomo Travaglini
<giacomo.travaglini@arm.com>
Thu, 11 Apr 2019 09:01:31 +0000
(09:01 +0000)
Change-Id: Ic1ec1d03464a7ce42295cee8a9f4ebcd3e90def1
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17948
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/pmu.cc
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diff --git
a/src/arch/arm/pmu.cc
b/src/arch/arm/pmu.cc
index 62353cf2b606797b2eb78c312fe7e9d2ec538234..93d4f5efb5f52c204e53a10dd217de831966e7db 100644
(file)
--- a/
src/arch/arm/pmu.cc
+++ b/
src/arch/arm/pmu.cc
@@
-333,6
+333,7
@@
PMU::readMiscRegInt(int misc_reg)
case MISCREG_PMSWINC: // Software Increment Register (RAZ)
return 0;
+ case MISCREG_PMSELR_EL0:
case MISCREG_PMSELR:
return reg_pmselr;