(no commit message)

diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index 1288cfaced09079e612af11f0fa05dc671694af6..3dd29fe79a743d98a9f1858de1dca7eed552fd34 100644 (file)
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -12,17 +12,21 @@
 
 **Books and Section affected**:
 
+```
     Book I Scalar Floating-Point 4.6.2.1
     Appendix D Power ISA sorted by opcode
     Appendix E Power ISA sorted by version
     Appendix F Power ISA sorted by mnemonic
+```
 
 **Summary**
 
+```
     Instructions added
     fmvis - Floating-Point Move Immediate, Single
     fishmv - Floating-Point Immediate, Second-half Move
     (Potentially 64-bit prefixed of the same)
+```
 
 **Submitter**: Luke Leighton (Libre-SOC)
 
@@ -30,17 +34,23 @@
 
 **Impact on processor**:
 
+```
     Addition of two new FPR-based instructions
     (potentially 4 if EXT001 Prefixed variants added)
+```
 
 **Impact on software**:
 
+```
     Requires support for new instructions in assembler, debuggers,
     and related tools.
+```
 
 **Keywords**:
 
+```
     FPR, Floating-point, Load-immediate, BF16, FP32
+```
 
 **Motivation**