Add new counter-enable CSRs

include/ChangeLog:

2017-02-22  Andrew Waterman  <andrew@sifive.com>

       * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
       (CSR_MCOUNTEREN): Likewise.
       (scounteren): Declare register.
       (mcounteren): Likewise.

diff --git a/include/ChangeLog b/include/ChangeLog
index 7e59ea21eb27ecea66e52ebc3348e57fc3e732ab..f3e581176d54ca794f1b0616f6215006e4489579 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-22  Andrew Waterman  <andrew@sifive.com>
+
+       * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
+       (CSR_MCOUNTEREN): Likewise.
+       (scounteren): Declare register.
+       (mcounteren): Likewise.
+
 2017-02-14  Andrew Waterman  <andrew@sifive.com>
 
        * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.

diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index dd580534b01ab820a3da5c5d0681b03d951c09c0..8f0f2bc0b133ef334da3d62dd032ebe267008484 100644 (file)
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -605,6 +605,7 @@
 #define CSR_SSTATUS 0x100
 #define CSR_SIE 0x104
 #define CSR_STVEC 0x105
+#define CSR_SCOUNTEREN 0x106
 #define CSR_SSCRATCH 0x140
 #define CSR_SEPC 0x141
 #define CSR_SCAUSE 0x142
@@ -617,6 +618,7 @@
 #define CSR_MIDELEG 0x303
 #define CSR_MIE 0x304
 #define CSR_MTVEC 0x305
+#define CSR_MCOUNTEREN 0x306
 #define CSR_MSCRATCH 0x340
 #define CSR_MEPC 0x341
 #define CSR_MCAUSE 0x342
@@ -1095,6 +1097,7 @@ DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
 DECLARE_CSR(sstatus, CSR_SSTATUS)
 DECLARE_CSR(sie, CSR_SIE)
 DECLARE_CSR(stvec, CSR_STVEC)
+DECLARE_CSR(scounteren, CSR_SCOUNTEREN)
 DECLARE_CSR(sscratch, CSR_SSCRATCH)
 DECLARE_CSR(sepc, CSR_SEPC)
 DECLARE_CSR(scause, CSR_SCAUSE)
@@ -1107,6 +1110,7 @@ DECLARE_CSR(medeleg, CSR_MEDELEG)
 DECLARE_CSR(mideleg, CSR_MIDELEG)
 DECLARE_CSR(mie, CSR_MIE)
 DECLARE_CSR(mtvec, CSR_MTVEC)
+DECLARE_CSR(mcounteren, CSR_MCOUNTEREN)
 DECLARE_CSR(mscratch, CSR_MSCRATCH)
 DECLARE_CSR(mepc, CSR_MEPC)
 DECLARE_CSR(mcause, CSR_MCAUSE)