re PR rtl-optimization/92796 (ICE in lra_assign, at lra-assigns.c:1646 on powerpc64le...

2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/92796
	* lra-int.h (lra_risky_transformations_p): Rename to
	check_and_force_assignment_correctness_p.
	* lra-assigns.c: Ditto.
	(lra_assign): Reset check_and_force_assignment_correctness_p.
	* lra-constraints.c (lra_risky_transformations_p): Rename to
	check_and_force_assignment_correctness_p.
	(lra_constraints): Set up check_and_force_assignment_correctness_p
	only for the 1st sub-pass.
	* lra-eliminations.c (process_insn_for_elimination): Set up
	check_and_force_assignment_correctness_p if the insn chnaged its
	code.

2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/92796
	* gcc.target/powerpc/pr92796.c: New test.

From-SVN: r279204

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f1276b4a7bb47f6f0e156fc0fcaf7c9dd296180e..c8ff6941d8fdde08c049556ccdd5eae070aaa5a5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/92796
+       * lra-int.h (lra_risky_transformations_p): Rename to
+       check_and_force_assignment_correctness_p.
+       * lra-assigns.c: Ditto.
+       (lra_assign): Reset check_and_force_assignment_correctness_p.
+       * lra-constraints.c (lra_risky_transformations_p): Rename to
+       check_and_force_assignment_correctness_p.
+       (lra_constraints): Set up check_and_force_assignment_correctness_p
+       only for the 1st sub-pass.
+       * lra-eliminations.c (process_insn_for_elimination): Set up
+       check_and_force_assignment_correctness_p if the insn chnaged its
+       code.
+
 2019-12-10  Jakub Jelinek  <jakub@redhat.com>
 
        PR rtl-optimization/92882

diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
index ca51be7a68e844f4355a1a9693e4281a30350b64..532b065e2c4af4d301320afa45e96c273a09b284 100644 (file)
--- a/gcc/lra-assigns.c
+++ b/gcc/lra-assigns.c
@@ -1131,7 +1131,7 @@ static int *sorted_pseudos;
 /* The constraints pass is allowed to create equivalences between
    pseudos that make the current allocation "incorrect" (in the sense
    that pseudos are assigned to hard registers from their own conflict
-   sets).  The global variable lra_risky_transformations_p says
+   sets).  The global variable check_and_force_assignment_correctness_p says
    whether this might have happened.
 
    Process pseudos assigned to hard registers (less frequently used
@@ -1152,7 +1152,7 @@ setup_live_pseudos_and_spill_after_risky_transforms (bitmap
   bitmap_iterator bi;
   int max_regno = max_reg_num ();
 
-  if (! lra_risky_transformations_p)
+  if (! check_and_force_assignment_correctness_p)
     {
       for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
        if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0)
@@ -1690,6 +1690,8 @@ lra_assign (bool &fails_p)
     internal_error
       ("maximum number of LRA assignment passes is achieved (%d)",
        LRA_MAX_ASSIGNMENT_ITERATION_NUMBER);
+  /* Reset the assignment correctness flag: */
+  check_and_force_assignment_correctness_p = false;
   return no_spills_p;
 }
 

diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 39d2d2c54210f0b9b9f88d3ebc838a1379f54ff5..9e0f50ea88c413fc7f51dc1160ce62408dbff3fa 100644 (file)
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -4665,11 +4665,14 @@ loc_equivalence_callback (rtx loc, const_rtx, void *data)
 /* The current iteration number of this LRA pass.  */
 int lra_constraint_iter;
 
-/* True if we substituted equiv which needs checking register
-   allocation correctness because the equivalent value contains
-   allocatable hard registers or when we restore multi-register
-   pseudo.  */
-bool lra_risky_transformations_p;
+/* True if we should during assignment sub-pass check assignment
+   correctness for all pseudos and spill some of them to correct
+   conflicts.  It can be necessary when we substitute equiv which
+   needs checking register allocation correctness because the
+   equivalent value contains allocatable hard registers, or when we
+   restore multi-register pseudo, or when we change the insn code and
+   its operand became INOUT operand when it was IN one before.  */
+bool check_and_force_assignment_correctness_p;
 
 /* Return true if REGNO is referenced in more than one block.  */
 static bool
@@ -4811,14 +4814,14 @@ lra_constraints (bool first_p)
   changed_p = false;
   if (pic_offset_table_rtx
       && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
-    lra_risky_transformations_p = true;
-  else
+    check_and_force_assignment_correctness_p = true;
+  else if (first_p)
     /* On the first iteration we should check IRA assignment
        correctness.  In rare cases, the assignments can be wrong as
        early clobbers operands are ignored in IRA or usages of
        paradoxical sub-registers are not taken into account by
        IRA.  */
-    lra_risky_transformations_p = first_p;
+    check_and_force_assignment_correctness_p = true;
   new_insn_uid_start = get_max_uid ();
   new_regno_start = first_p ? lra_constraint_new_regno_start : max_reg_num ();
   /* Mark used hard regs for target stack size calulations.  */
@@ -4994,7 +4997,7 @@ lra_constraints (bool first_p)
                      dump_insn_slim (lra_dump_file, curr_insn);
                    }
                  if (contains_reg_p (x, true, false))
-                   lra_risky_transformations_p = true;
+                   check_and_force_assignment_correctness_p = true;
                  lra_set_insn_deleted (curr_insn);
                  continue;
                }
@@ -5507,7 +5510,7 @@ need_for_split_p (HARD_REG_SET potential_reload_hard_regs, int regno)
           /* Don't split call clobbered hard regs living through
              calls, otherwise we might have a check problem in the
              assign sub-pass as in the most cases (exception is a
-             situation when lra_risky_transformations_p value is
+             situation when check_and_force_assignment_correctness_p value is
              true) the assign pass assumes that all pseudos living
              through calls are assigned to call saved hard regs.  */
           && (regno >= FIRST_PSEUDO_REGISTER
@@ -5799,7 +5802,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
        sub-register levels, LRA do this on pseudos level right now and
        this discrepancy may create allocation conflicts after
        splitting.  */
-    lra_risky_transformations_p = true;
+    check_and_force_assignment_correctness_p = true;
   if (lra_dump_file != NULL)
     fprintf (lra_dump_file,
             "    ))))))))))))))))))))))))))))))))))))))))))))))))\n");
@@ -6561,7 +6564,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
                                                 before_p, curr_insn, max_uid))
                        {
                          if (reg->subreg_p)
-                           lra_risky_transformations_p = true;
+                           check_and_force_assignment_correctness_p = true;
                          change_p = true;
                          /* Invalidate. */
                          usage_insns[src_regno].check = 0;

diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
index 04dc6dfa7c307cb6a406ccd2550cd825747553d0..3c8ac77fd88d404fa188b602b35a8bb68cbc1643 100644 (file)
--- a/gcc/lra-eliminations.c
+++ b/gcc/lra-eliminations.c
@@ -1311,6 +1311,11 @@ process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
 
       if (icode >= 0 && icode != INSN_CODE (insn))
        {
+         if (INSN_CODE (insn) >= 0)
+           /* Insn code is changed.  It may change its operand type
+              from IN to INOUT.  Inform the subsequent assignment
+              subpass about this situation.  */
+           check_and_force_assignment_correctness_p = true;
          INSN_CODE (insn) = icode;
          lra_update_insn_recog_data (insn);
        }

diff --git a/gcc/lra-int.h b/gcc/lra-int.h
index 707b5d450db7ea6aef44ef229eb98606130d6a24..a103c7d537df174604f694009174d1f5b5d06253 100644 (file)
--- a/gcc/lra-int.h
+++ b/gcc/lra-int.h
@@ -337,7 +337,7 @@ extern void lra_init_equiv (void);
 extern int lra_constraint_offset (int, machine_mode);
 
 extern int lra_constraint_iter;
-extern bool lra_risky_transformations_p;
+extern bool check_and_force_assignment_correctness_p;
 extern int lra_inheritance_iter;
 extern int lra_undo_inheritance_iter;
 extern bool lra_constrain_insn (rtx_insn *);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b47cb9af89f64b7e9e99533410a4af3b9cea4586..2ce9f6a38fd18e7c1e7803b2ebfde58b59ed4a6a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-12-10  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/92796
+       * gcc.target/powerpc/pr92796.c: New test.
+
 2019-12-10  Thomas Koenig  <tkoenig@gcc.gnu.org>
 
        PR fortran/91643

diff --git a/gcc/testsuite/gcc.target/powerpc/pr92796.c b/gcc/testsuite/gcc.target/powerpc/pr92796.c
new file mode 100644 (file)
index 0000000..aa15b2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92796.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fstack-protector-strong -mcpu=power8" } */
+
+typedef union
+{
+  __ieee128 a;
+  int b;
+} c;
+
+__ieee128
+d (__ieee128 x)
+{
+  __ieee128 g;
+  c h;
+  h.a = x;
+  g = h.b & 5;
+  h.b = g;
+  if (g)
+    return x - x;
+  return h.a;
+}