radv: round vgprs/sgprs before calculating max_waves

Note that ACO doesn't correctly round SGPR counts on GFX8/GFX9.

pipeline-db (ACO/Vega):
SGPRS: 11000 -> 11000 (0.00 %)
VGPRS: 3120 -> 3120 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 164328 -> 164328 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 1125 -> 1000 (-11.11 %)

v2: consider wave32

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 5f962ed160ba064a0e49d685c565ead223f5f7f8..06e8edf9ea2ef2f163ef630379b43a9ab71216eb 100644 (file)
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -1289,16 +1289,20 @@ radv_get_max_waves(struct radv_device *device,
                               DIV_ROUND_UP(max_workgroup_size, wave_size);
        }
 
-       if (conf->num_sgprs)
+       if (conf->num_sgprs) {
+               unsigned sgprs = align(conf->num_sgprs, chip_class >= GFX8 ? 16 : 8);
                max_simd_waves =
                        MIN2(max_simd_waves,
                             device->physical_device->rad_info.num_physical_sgprs_per_simd /
-                            conf->num_sgprs);
+                            sgprs);
+       }
 
-       if (conf->num_vgprs)
+       if (conf->num_vgprs) {
+               unsigned vgprs = align(conf->num_vgprs, wave_size == 32 ? 8 : 4);
                max_simd_waves =
                        MIN2(max_simd_waves,
-                            RADV_NUM_PHYSICAL_VGPRS / conf->num_vgprs);
+                            RADV_NUM_PHYSICAL_VGPRS / vgprs);
+       }
 
        /* LDS is 64KB per CU (4 SIMDs), divided into 16KB blocks per SIMD
         * that PS can use.