Eliminate false DVs on parallel compares.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2b893d4a17186c75106b9fdaaee899602336fe8e..1e1ef03c2a08bc5a856a850443133b3a0bc8cf2a 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2000-09-14  Timothy Wall  <twall@cygnus.com>
+
+       * config/tc-ia64.c (specify_resource): For PR%/PR63, note types of
+       parallel comparisons for later use.
+       (struct rsrc): Add parallel comparison type.
+       (resources_match): Skip special cases of PR usage (non-conflicting
+       parallel compares).
+       
 2000-09-13  Kazu Hirata  <kazu@hxi.com>
 
        * config/obj-ecoff.c: Fix formatting.

diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c
index 7e0193d3e7a7cfb31755a46c4c8234633c6a56d3..25cdfcdf376c1b34cc2a593ae8955095e6b79962 100644 (file)
--- a/gas/config/tc-ia64.c
+++ b/gas/config/tc-ia64.c
@@ -521,6 +521,7 @@ static struct rsrc {
   char *file;                       /* what file marked this dependency */
   int line;                         /* what line marked this dependency */
   struct mem_offset mem_offset;     /* optional memory offset hint */
+  enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
   int path;                         /* corresponding code entry index */
 } *regdeps = NULL;
 static int regdepslen = 0;
@@ -528,6 +529,7 @@ static int regdepstotlen = 0;
 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
 static const char *dv_sem[] = { "none", "implied", "impliedf",
                                "data", "instr", "specific", "other" };
+static const char *dv_cmp_type[] = { "none", "OR", "AND" };
 
 /* Current state of PR mutexation */
 static struct qpmutex {
@@ -6374,6 +6376,7 @@ specify_resource (dep, idesc, type, specs, note, path)
   tmpl.mem_offset.hint = 0;
   tmpl.specific = 1;
   tmpl.index = 0;
+  tmpl.cmp_type = CMP_NONE;
 
 #define UNHANDLED \
 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
@@ -7008,11 +7011,16 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
            {
              int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
              int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
+             int or_andcm = strstr(idesc->name, "or.andcm") != NULL;
+             int and_orcm = strstr(idesc->name, "and.orcm") != NULL;
+
              if ((idesc->operands[0] == IA64_OPND_P1
                   || idesc->operands[0] == IA64_OPND_P2)
                  && p1 != 0 && p1 != 63)
                {
                  specs[count] = tmpl;
+                 specs[count].cmp_type = 
+                   (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
                  specs[count++].index = p1;
                }
              if ((idesc->operands[1] == IA64_OPND_P1
@@ -7020,6 +7028,8 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
                  && p2 != 0 && p2 != 63)
                {
                  specs[count] = tmpl;
+                 specs[count].cmp_type = 
+                   (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
                  specs[count++].index = p2;
                }
            }
@@ -7462,13 +7472,27 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
        {
          if (rsrc_write)
            {
-             for (i = 0; i < idesc->num_outputs; i++)
-               if ((idesc->operands[i] == IA64_OPND_P1
-                    || idesc->operands[i] == IA64_OPND_P2)
-                   && CURR_SLOT.opnd[i].X_add_number - REG_P == 63)
-                 {
-                   specs[count++] = tmpl;
-                 }
+              int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
+              int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
+             int or_andcm = strstr(idesc->name, "or.andcm") != NULL;
+             int and_orcm = strstr(idesc->name, "and.orcm") != NULL;
+
+             if (p1 == 63 
+                 && (idesc->operands[0] == IA64_OPND_P1
+                     || idesc->operands[0] == IA64_OPND_P2))
+               {
+                  specs[count] = tmpl;
+                 specs[count++].cmp_type = 
+                   (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
+               }
+             if (p2 == 63
+                 && (idesc->operands[1] == IA64_OPND_P1
+                     || idesc->operands[1] == IA64_OPND_P2))
+               {
+                  specs[count] = tmpl;
+                 specs[count++].cmp_type = 
+                   (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
+               }
            }
          else
            {
@@ -7951,6 +7975,32 @@ resources_match (rs, idesc, note, qp_regno, path)
            }
        }
 
+      /* Skip apparent PR write conflicts where both writes are an AND or both
+        writes are an OR. */
+      if (rs->dependency->specifier == IA64_RS_PR
+         || rs->dependency->specifier == IA64_RS_PR63)
+       {
+         if (specs[count].cmp_type != CMP_NONE
+             && specs[count].cmp_type == rs->cmp_type)
+           {
+             if (md.debug_dv)
+               fprintf (stderr, "  %s on parallel compare allowed (PR%d)\n",
+                        dv_mode[rs->dependency->mode],
+                        rs->dependency->specifier == IA64_RS_PR ?
+                        specs[count].index : 63);
+             continue;
+           }
+         if (md.debug_dv)
+           fprintf (stderr, 
+                    "  %s on parallel compare conflict %s vs %s on PR%d\n",
+                    dv_mode[rs->dependency->mode],
+                    dv_cmp_type[rs->cmp_type], 
+                    dv_cmp_type[specs[count].cmp_type],
+                    rs->dependency->specifier == IA64_RS_PR ?
+                    specs[count].index : 63);
+                    
+       }
+
       /* If either resource is not specific, conservatively assume a conflict
        */
       if (!specs[count].specific || !rs->specific)

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2b1d5582a4f3ad2a50c06c8d1270b6624d6b3d5b..16aa307f684f836077a983488bdd37d2f857a2fd 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2000-09-14  Timothy Wall  <twall@cygnus.com>
+
+       * gas/ia64/dv-waw-err.[sl]: Additional tests for parallel
+       comparisons which should and should not produce DVs.
+
 2000-09-05  Alan Modra  <alan@linuxcare.com.au>
 
        * gas/vtable/vtable.exp: Re-enable for hppa-elf.

diff --git a/gas/testsuite/gas/ia64/dv-waw-err.l b/gas/testsuite/gas/ia64/dv-waw-err.l
index 51fb26a6fcb78480919c21cab75b3a84b1d6ceb8..2a79088103f2c4cc25f4c9115334de23f331ab94 100644 (file)
--- a/gas/testsuite/gas/ia64/dv-waw-err.l
+++ b/gas/testsuite/gas/ia64/dv-waw-err.l
@@ -351,3 +351,27 @@
 .*:507: Warning: This is the location of the conflicting usage
 .*:513: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\), specific resource number is 7
 .*:512: Warning: This is the location of the conflicting usage
+.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
+.*:536: Warning: This is the location of the conflicting usage
+.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
+.*:536: Warning: This is the location of the conflicting usage
+.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
+.*:536: Warning: This is the location of the conflicting usage
+.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
+.*:536: Warning: This is the location of the conflicting usage
+.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
+.*:539: Warning: This is the location of the conflicting usage
+.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
+.*:539: Warning: This is the location of the conflicting usage
+.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
+.*:539: Warning: This is the location of the conflicting usage
+.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
+.*:539: Warning: This is the location of the conflicting usage
+.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
+.*:542: Warning: This is the location of the conflicting usage
+.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
+.*:542: Warning: This is the location of the conflicting usage
+.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
+.*:542: Warning: This is the location of the conflicting usage
+.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
+.*:542: Warning: This is the location of the conflicting usage

diff --git a/gas/testsuite/gas/ia64/dv-waw-err.s b/gas/testsuite/gas/ia64/dv-waw-err.s
index c6f4fe0cba9a8bd4805f848c071780966bb69599..631c7f3d4407dd05b76564cafbdb056993bfc490 100644 (file)
--- a/gas/testsuite/gas/ia64/dv-waw-err.s
+++ b/gas/testsuite/gas/ia64/dv-waw-err.s
@@ -513,4 +513,33 @@
        mov     rr[r2] = r3
        ;;
 // RSE
+       
+// PR, additional cases (or.andcm and and.orcm interaction)
+       cmp.eq.or.andcm p6, p7 = 1, r32
+       cmp.eq.or.andcm p6, p7 = 5, r36 // no DV here
+       ;;
+       cmp.eq.and.orcm p6, p7 = 1, r32
+       cmp.eq.and.orcm p6, p7 = 5, r36 // no DV here
+       ;;
+       cmp.eq.or.andcm p63, p7 = 1, r32
+       cmp.eq.or.andcm p63, p7 = 5, r36 // no DV here
+       ;;
+       cmp.eq.or.andcm p6, p63 = 1, r32
+       cmp.eq.or.andcm p6, p63 = 5, r36 // no DV here
+       ;;
+       cmp.eq.and.orcm p63, p7 = 1, r32
+       cmp.eq.and.orcm p63, p7 = 5, r36 // no DV here
+       ;;
+       cmp.eq.and.orcm p6, p63 = 1, r32
+       cmp.eq.and.orcm p6, p63 = 5, r36 // no DV here
+       ;;
+       cmp.eq.or.andcm p6, p7 = 1, r32
+       cmp.eq.and.orcm p6, p7 = 5, r36 
+       ;;
+       cmp.eq.or.andcm p63, p7 = 1, r32
+       cmp.eq.and.orcm p63, p7 = 5, r36        
+       ;;
+       cmp.eq.or.andcm p6, p63 = 1, r32
+       cmp.eq.and.orcm p6, p63 = 5, r36        
+       ;;
 L: