[ cgen/ChangeLog ]
authorGraydon Hoare <graydon@redhat.com>
Wed, 8 May 2002 20:47:07 +0000 (20:47 +0000)
committerGraydon Hoare <graydon@redhat.com>
Wed, 8 May 2002 20:47:07 +0000 (20:47 +0000)
2002-05-01  Graydon Hoare  <graydon@redhat.com>

* desc-cpu.scm (@arch@_cgen_cpu_close): Fix memory leaks.

[ opcodes/ChangeLog ]

2002-05-07  Graydon Hoare  <graydon@redhat.com>

* cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
than just most-recently-opened.

opcodes/ChangeLog
opcodes/cgen-dis.in

index 80f094c6aeb3eb87e5ec7a0e06b82fc9c286fb9e..ed306bf15539f6b69699137b5caa1f908c38b33b 100644 (file)
@@ -1,3 +1,8 @@
+2002-05-07  Graydon Hoare  <graydon@redhat.com>
+
+       * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather 
+       than just most-recently-opened.
+
 2002-05-01  Alan Modra  <amodra@bigpond.net.au>
 
        * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.
index c78723e26416dd4fbe9e61d000c47eb912e232b5..7c5934037df8b92b06bac86f545c9125ab164a10 100644 (file)
@@ -351,11 +351,21 @@ default_print_insn (cd, pc, info)
    Print one instruction from PC on INFO->STREAM.
    Return the size of the instruction (in bytes).  */
 
+typedef struct cpu_desc_list {
+  struct cpu_desc_list *next;
+  int isa;
+  int mach;
+  int endian;
+  CGEN_CPU_DESC cd;
+} cpu_desc_list;
+
 int
 print_insn_@arch@ (pc, info)
      bfd_vma pc;
      disassemble_info *info;
 {
+  static cpu_desc_list *cd_list = 0;
+  cpu_desc_list *cl = 0;
   static CGEN_CPU_DESC cd = 0;
   static int prev_isa;
   static int prev_mach;
@@ -389,15 +399,24 @@ print_insn_@arch@ (pc, info)
   isa = info->insn_sets;
 #endif
 
-  /* If we've switched cpu's, close the current table and open a new one.  */
+  /* If we've switched cpu's, try to find a handle we've used before */
   if (cd
       && (isa != prev_isa
          || mach != prev_mach
          || endian != prev_endian))
     {
-      @arch@_cgen_cpu_close (cd);
       cd = 0;
-    }
+      for (cl = cd_list; cl; cl = cl->next)
+       {
+         if (cl->isa == isa &&
+             cl->mach == mach &&
+             cl->endian == endian)
+           {
+             cd = cl->cd;
+             break;
+           }
+       }
+    } 
 
   /* If we haven't initialized yet, initialize the opcode table.  */
   if (! cd)
@@ -418,6 +437,16 @@ print_insn_@arch@ (pc, info)
                                 CGEN_CPU_OPEN_END);
       if (!cd)
        abort ();
+
+      /* save this away for future reference */
+      cl = xmalloc (sizeof (struct cpu_desc_list));
+      cl->cd = cd;
+      cl->isa = isa;
+      cl->mach = mach;
+      cl->endian = endian;
+      cl->next = cd_list;
+      cd_list = cl;
+
       @arch@_cgen_init_dis (cd);
     }