Generate a warning in the ARM assembler if a PC-relative thumb load instruction is...

	* config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
	detected in a section which does not have at least 4 byte
	alignment.
	* testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
	* testsuite/gas/arm/ldr-t.s: Likewise.
	* testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
	* testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
	disassembly, ignoring any NOPs that may have been inserted because
	of section alignment.
	* testsuite/gas/arm/ldr-t.d: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7a2dfe14bc0e926a2f36265c9eebdab6177fac3d..d5611ee76854d1fee3bc9b85815d635ec51c9cb6 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,16 @@
+2020-03-04  Alexandre Oliva  <oliva@adacore.com>
+
+       * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
+       detected in a section which does not have at least 4 byte
+       alignment.
+       * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
+       * testsuite/gas/arm/ldr-t.s: Likewise.
+       * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
+       * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
+       disassembly, ignoring any NOPs that may have been inserted because
+       of section alignment.
+       * testsuite/gas/arm/ldr-t.d: Likewise.
+
 2020-03-04  Jan Beulich  <jbeulich@suse.com>
 
        * config/tc-i386.c (cpu_arch): Add .sev_es entry.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 59b1f6b3f539746fe7ba513ea26d6ed5b916d3dc..329a2de10714843684d01e6f87ed622b7c968ba3 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -29290,6 +29290,9 @@ md_apply_fix (fixS *    fixP,
                          (((unsigned long) fixP->fx_frag->fr_address
                            + (unsigned long) fixP->fx_where) & ~3)
                          + (unsigned long) value);
+         else if (get_recorded_alignment (seg) < 2)
+           as_warn_where (fixP->fx_file, fixP->fx_line,
+                          _("section does not have enough alignment to ensure safe PC-relative loads"));
 
          if (value & ~0x3fc)
            as_bad_where (fixP->fx_file, fixP->fx_line,

diff --git a/gas/testsuite/gas/arm/armv8-ar-it-bad.s b/gas/testsuite/gas/arm/armv8-ar-it-bad.s
index 9864bf807d77af13e9e14ce348a9dc1224eb56bd..3a67e8d4788a79c7a47fe32820599802ad252070 100644 (file)
--- a/gas/testsuite/gas/arm/armv8-ar-it-bad.s
+++ b/gas/testsuite/gas/arm/armv8-ar-it-bad.s
@@ -1,6 +1,6 @@
-.syntax unified
-
-.thumb
+       .syntax unified
+       .thumb
+       .align 2
 @ Wide instruction in IT block is deprecated.
 it eq
 ldrdeq r0, [r1]

diff --git a/gas/testsuite/gas/arm/ldr-t.d b/gas/testsuite/gas/arm/ldr-t.d
index ddcd61274b0a11559ce364246407e3ad597d5109..97637392c16787dee1c39f23c4cea9fb17d0d13a 100644 (file)
--- a/gas/testsuite/gas/arm/ldr-t.d
+++ b/gas/testsuite/gas/arm/ldr-t.d
@@ -34,4 +34,4 @@ Disassembly of section [^>]+:
 0+4e <[^>]+> f8c1 100a         str.w   r1, \[r1, #10\]
 0+52 <[^>]+> f842 1f0a         str.w   r1, \[r2, #10\]!
 0+56 <[^>]+> 50d1              str     r1, \[r2, r3\]
-
+#pass

diff --git a/gas/testsuite/gas/arm/ldr-t.s b/gas/testsuite/gas/arm/ldr-t.s
index 4aaecdf61f1ee9a35d3bc0a0f6fff8824faf7d0f..ba3b1e066d48b404c171f209b8fbd458fda3da45 100644 (file)
--- a/gas/testsuite/gas/arm/ldr-t.s
+++ b/gas/testsuite/gas/arm/ldr-t.s
@@ -3,6 +3,7 @@
 .thumb
        .global foo
 foo:
+       .align 4
        @ldr-immediate
 
        @!wback && (n == t)

diff --git a/gas/testsuite/gas/arm/sp-pc-usage-t.d b/gas/testsuite/gas/arm/sp-pc-usage-t.d
index 6dedc00ce4f3ba135a20d1be123d43b7c17289dc..c9b0800223a76c49995f65dcfb3da066348d6497 100644 (file)
--- a/gas/testsuite/gas/arm/sp-pc-usage-t.d
+++ b/gas/testsuite/gas/arm/sp-pc-usage-t.d
@@ -79,4 +79,4 @@ Disassembly of section .text:
 000000f6 <foo\+0xf6> bf00              nop
 000000f8 <foo\+0xf8> bf00              nop
 000000fa <foo\+0xfa> bf00              nop
-
+#pass

diff --git a/gas/testsuite/gas/arm/sp-pc-usage-t.s b/gas/testsuite/gas/arm/sp-pc-usage-t.s
index 6cfebed4a612e61f4702f956076aa7f6da277bbf..70bf0d9e7c8c35658f069a993a2ab59bd2d8332f 100644 (file)
--- a/gas/testsuite/gas/arm/sp-pc-usage-t.s
+++ b/gas/testsuite/gas/arm/sp-pc-usage-t.s
@@ -3,7 +3,8 @@
 .text
 .thumb
        .global foo
-foo:   
+foo:
+       .align 4
 @ Section A6.1.3 "Use of 0b1101 as a register specifier".
 
 @ R13 as the source or destination register of a mov instruction.