(no commit message)

diff --git a/openpower/sv/vector_isa_comparison.mdwn b/openpower/sv/vector_isa_comparison.mdwn
index cbcfe439f4493a0795fb269a2c1e0faf4f22607a..005edc8b3dce20833037408c2e6af45de47ff9d5 100644 (file)
--- a/openpower/sv/vector_isa_comparison.mdwn
+++ b/openpower/sv/vector_isa_comparison.mdwn
@@ -76,8 +76,9 @@ SIMD ISAs used features "inspired" from Scalable Vector ISAs.
   in AVX-512.
 * ARM NEON - accurately described as a Packed SIMD ISA in
   all literature.
-* ARM SVE / SVE2 - partially accurately described as a Scalable Vector
-  ISA, but the "Scaling" is, rather unfortunately, a parameter
+* ARM SVE / SVE2 - **not a Scalable Vector ISA**, it is actually
+  a hybrid PackedSIMD/PredicatedSIMD ISA.
+  The "Scaling" is, rather unfortunately, a parameter
   that is chosen by the *Hardware Architect*, rather than
   the programmer. The actual "Scalar" part as far as the programmer
   is concerned is supposed to be the Predicate Masks.  However in