add zero predication section

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index cb21c6e67b149ac3fb9758139f9d54f925cdac14..0cf5c2468243ea88af213fb1937c7c882431287e 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -1987,6 +1987,11 @@ Here is pseudo-code for a twin zero-predicated operation:
             if ((pd & 1<<j))
                 break;
 
+Note that in the instance where the destination is a scalar, the hardware
+loop is ended the moment a value *or a zero* is placed into the destination
+register/element.  Also note that, for clarity, variable element widths
+have been left out of the above.
+
 # Exceptions
 
 TODO: expand.  Exceptions may occur at any time, in any given underlying