Fix xilinx_dsp for unsigned extensions

diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index 3d0b1f2c3ce80f736b8ee1439a5057f8c1b37a6a..4e174e753e2fbecc767b7bf3cde2a29978892126 100644 (file)
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -277,7 +277,9 @@ match postAdd
        index <SigBit> port(postAdd, AB)[0] === sigP[0]
        filter GetSize(port(postAdd, AB)) >= GetSize(sigP)
        filter port(postAdd, AB).extract(0, GetSize(sigP)) == sigP
-       filter port(postAdd, AB).extract_end(GetSize(sigP)) == SigSpec(sigP[GetSize(sigP)-1], GetSize(port(postAdd, AB))-GetSize(sigP))
+       // Check that remainder of AB is a sign-extension
+       define <bool> AB_SIGNED (param(postAdd, AB == \A ? \A_SIGNED : \B_SIGNED).as_bool())
+       filter port(postAdd, AB).extract_end(GetSize(sigP)) == SigSpec(AB_SIGNED ? sigP[GetSize(sigP)-1] : State::S0, GetSize(port(postAdd, AB))-GetSize(sigP))
        set postAddAB AB
        optional
 endmatch