return _insn->p->get_state()->FPR[reg]; // XXX TODO: offset
}
-reg_t (sv_proc_t::READ_REG)(reg_spec_t const& spec)
+reg_t sv_proc_t::READ_REG(reg_spec_t const& spec, sv_reg_t const& imm,
+ bool addr_mode, size_t width)
{
reg_t reg = spec.reg;
int bitwidth = get_bitwidth(_insn->reg_elwidth(reg, true), xlen);
sv_reg_t sv_proc_t::mmu_load(reg_spec_t const& spec, sv_reg_t const& offs,
size_t width, bool ext)
{
- reg_t reg = READ_REG(spec);
+ // okaay, so a different "mode" applies, here
+ reg_t reg = READ_REG(spec, true, offs, width);
sv_reg_t addr = rv_add(reg, offs);
switch (width)
{
void (WRITE_FRD)(sv_float128_t value);
void (WRITE_FRD)(sv_float64_t value);
void (WRITE_FRD)(sv_float32_t value);
- reg_t (READ_REG)(reg_spec_t const& i);
+ reg_t READ_REG(reg_spec_t const& i, sv_reg_t const& imm,
+ bool addr_mode, size_t width);
+ reg_t READ_REG(reg_spec_t const& spec)
+ { return READ_REG(spec, sv_reg_t(0), false, xlen); }
freg_t (READ_FREG)(reg_spec_t const& i);
processor_t *p;