radv: fix non-0 based layer clears.

If the layer base was > 0, it wasn't getting passed as the start
instance or getting added in the shaders.

Fixes CTS dEQP-VK.api.image_clearing.core.clear_color_attachment.2d_r8_uint_multiple_layers

Fixes: 7e0382fb (radv: add support for layered clears (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index e9021915343bff11d8463bfaf9af905dbadfa969..d007f97b30e3ba516c3531ad3c1526e4075a73cd 100644 (file)
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -81,8 +81,10 @@ build_color_shaders(struct nir_shader **out_vs,
        vs_out_layer->data.location = VARYING_SLOT_LAYER;
        vs_out_layer->data.interpolation = INTERP_MODE_FLAT;
        nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0);
+       nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0);
 
-       nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1);
+       nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance);
+       nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1);
 
        *out_vs = vs_b.shader;
        *out_fs = fs_b.shader;
@@ -398,7 +400,7 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer,
 
        radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &clear_rect->rect);
 
-       radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0);
+       radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, clear_rect->baseArrayLayer);
 
        radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false);
 }
@@ -439,7 +441,10 @@ build_depthstencil_shader(struct nir_shader **out_vs, struct nir_shader **out_fs
        vs_out_layer->data.location = VARYING_SLOT_LAYER;
        vs_out_layer->data.interpolation = INTERP_MODE_FLAT;
        nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0);
-       nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1);
+       nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0);
+
+       nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance);
+       nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1);
 
        *out_vs = vs_b.shader;
        *out_fs = fs_b.shader;
@@ -654,7 +659,7 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
 
        radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &clear_rect->rect);
 
-       radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0);
+       radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, clear_rect->baseArrayLayer);
 }
 
 static bool