return ones == 1;
}
+bool
+ir_constant::is_uint16_constant() const
+{
+ if (!type->is_integer())
+ return false;
+
+ return value.u[0] < (1 << 16);
+}
+
ir_loop::ir_loop()
{
this->ir_type = ir_type_loop;
*/
virtual bool is_basis() const;
+ /**
+ * Determine if an r-value is an unsigned integer constant which can be
+ * stored in 16 bits.
+ *
+ * \sa ir_constant::is_uint16_constant.
+ */
+ virtual bool is_uint16_constant() const { return false; }
/**
* Return a generic value of error_type.
virtual bool is_negative_one() const;
virtual bool is_basis() const;
+ /**
+ * Return true for constants that could be stored as 16-bit unsigned values.
+ *
+ * Note that this will return true even for signed integer ir_constants, as
+ * long as the value is non-negative and fits in 16-bits.
+ */
+ virtual bool is_uint16_constant() const;
+
/**
* Value of the constant.
*
}
}
-static bool
-is_16bit_constant(ir_rvalue *rvalue)
-{
- ir_constant *constant = rvalue->as_constant();
- if (!constant)
- return false;
-
- if (constant->type != glsl_type::int_type &&
- constant->type != glsl_type::uint_type)
- return false;
-
- return constant->value.u[0] < (1 << 16);
-}
-
void
vec4_visitor::visit(ir_expression *ir)
{
* operand. If we can determine that one of the args is in the low
* 16 bits, though, we can just emit a single MUL.
*/
- if (is_16bit_constant(ir->operands[0])) {
+ if (ir->operands[0]->is_uint16_constant()) {
if (brw->gen < 7)
emit(MUL(result_dst, op[0], op[1]));
else
emit(MUL(result_dst, op[1], op[0]));
- } else if (is_16bit_constant(ir->operands[1])) {
+ } else if (ir->operands[1]->is_uint16_constant()) {
if (brw->gen < 7)
emit(MUL(result_dst, op[1], op[0]));
else