Use the new active-low PinsN platform feature.

diff --git a/nmigen_boards/dev/flash.py b/nmigen_boards/dev/flash.py
index a4b5e33ac1ead5de68e5e170ea5218209851d9ac..0311789cc74e6e75bd9aca2177fac00b34bdd577 100644 (file)
--- a/nmigen_boards/dev/flash.py
+++ b/nmigen_boards/dev/flash.py
@@ -4,33 +4,30 @@ from nmigen.build import *
 __all__ = ["SPIFlashResources"]
 
 
-def SPIFlashResources(number, *, cs_n, clk, mosi, miso, wp_n=None, hold_n=None, attrs=None):
+def SPIFlashResources(number, *, cs, clk, mosi, miso, wp=None, hold=None, attrs=None):
     resources = []
 
     io_all = []
     if attrs is not None:
         io_all.append(attrs)
-    io_all.append(Subsignal("cs_n", Pins(cs_n, dir="o")))
-    io_all.append(Subsignal("clk",  Pins(clk,  dir="o")))
+    io_all.append(Subsignal("cs",  PinsN(cs, dir="o")))
+    io_all.append(Subsignal("clk", Pins(clk, dir="o")))
 
     io_1x = list(io_all)
     io_1x.append(Subsignal("mosi", Pins(mosi, dir="o")))
     io_1x.append(Subsignal("miso", Pins(miso, dir="i")))
-    if wp_n is not None and hold_n is not None:
-        # Tristate these pins by default, and rely on a pullup on the board or within the flash.
-        # An alternative would be to define them as outputs with reset value of 1, but that's
-        # not currently possible in nMigen.
-        io_1x.append(Subsignal("wp_n",   Pins(wp_n, dir="oe")))
-        io_1x.append(Subsignal("hold_n", Pins(hold_n, dir="oe")))
+    if wp is not None and hold is not None:
+        io_1x.append(Subsignal("wp",   PinsN(wp,   dir="o")))
+        io_1x.append(Subsignal("hold", PinsN(hold, dir="o")))
     resources.append(Resource("spiflash", number, *io_1x))
 
     io_2x = list(io_all)
     io_2x.append(Subsignal("dq", Pins(" ".join([mosi, miso]), dir="io")))
     resources.append(Resource("spiflash2x", number, *io_2x))
 
-    if wp_n is not None and hold_n is not None:
+    if wp is not None and hold is not None:
         io_4x = list(io_all)
-        io_4x.append(Subsignal("dq", Pins(" ".join([mosi, miso, wp_n, hold_n]), dir="io")))
+        io_4x.append(Subsignal("dq", Pins(" ".join([mosi, miso, wp, hold]), dir="io")))
         resources.append(Resource("spiflash4x", number, *io_4x))
 
     return resources

diff --git a/nmigen_boards/ice40_hx1k_blink_evn.py b/nmigen_boards/ice40_hx1k_blink_evn.py
index 11b454e7fc0aa5ae0b27ce4f3421fb7eeb17072d..ab280a2dd0270d74fdbf7a695927423674efb407 100644 (file)
--- a/nmigen_boards/ice40_hx1k_blink_evn.py
+++ b/nmigen_boards/ice40_hx1k_blink_evn.py
@@ -27,8 +27,7 @@ class ICE40HX1KBlinkEVNPlatform(LatticeICE40Platform):
         Resource("user_btn", 3, Pins("52"), Attrs(IO_STANDARD="SB_LVCMOS33")),
 
         *SPIFlashResources(0,
-            cs_n="49", clk="48",
-            mosi="45", miso="46",
+            cs="49", clk="48", mosi="45", miso="46",
             attrs=Attrs(IO_STANDARD="SB_LVCMOS33")
         ),
     ]

diff --git a/nmigen_boards/icebreaker.py b/nmigen_boards/icebreaker.py
index 0b84b5662888b967dc93472a19e737e1874edd38..d9e684a3d2f8b306945bf80ba5d69c31f8a32675 100644 (file)
--- a/nmigen_boards/icebreaker.py
+++ b/nmigen_boards/icebreaker.py
@@ -16,12 +16,13 @@ class ICEBreakerPlatform(LatticeICE40Platform):
         Resource("clk12", 0, Pins("35", dir="i"),\r
                  Clock(12e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),\r
 \r
-        Resource("user_led_n", 0, Pins("11", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
-        Resource("user_led_n", 1, Pins("37", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
+        Resource("user_led",  0, PinsN("11", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
+        Resource("user_led",  1, PinsN("37", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
         # Color-specific aliases\r
-        Resource("user_ledr_n", 0, Pins("11", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
-        Resource("user_ledg_n", 0, Pins("37", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
-        Resource("user_btn_n", 4, Pins("10", dir="i"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
+        Resource("user_ledr", 0, PinsN("11", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
+        Resource("user_ledg", 0, PinsN("37", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
+\r
+        Resource("user_btn",  4, PinsN("10", dir="i"), Attrs(IO_STANDARD="SB_LVCMOS33")),\r
 \r
         Resource("serial", 0,\r
             Subsignal("rx",  Pins("6", dir="i")),\r
@@ -30,9 +31,7 @@ class ICEBreakerPlatform(LatticeICE40Platform):
         ),\r
 \r
         *SPIFlashResources(0,\r
-            cs_n="16", clk="15",\r
-            mosi="14", miso="17",\r
-            wp_n="12", hold_n="13",\r
+            cs="16", clk="15", mosi="14", miso="17", wp="12", hold="13",\r
             attrs=Attrs(IO_STANDARD="SB_LVCMOS33")\r
         ),\r
     ]\r

diff --git a/nmigen_boards/icestick.py b/nmigen_boards/icestick.py
index cf5c81ce872bcd5ed364a4806af288edc40235a7..778ad2d5f8a23dfe829222ac4b85aba8a403a135 100644 (file)
--- a/nmigen_boards/icestick.py
+++ b/nmigen_boards/icestick.py
@@ -41,8 +41,7 @@ class ICEStickPlatform(LatticeICE40Platform):
         ),
 
         *SPIFlashResources(0,
-            cs_n="71", clk="70",
-            mosi="67", miso="68",
+            cs="71", clk="70", mosi="67", miso="68",
             attrs=Attrs(IO_STANDARD="SB_LVCMOS33")
         ),
     ]

diff --git a/nmigen_boards/tinyfpga_bx.py b/nmigen_boards/tinyfpga_bx.py
index 544e0ce3a9236a937d5f90f823798a056b994d40..5dcd7aa59302498957be334b845ad24e99f0b546 100644 (file)
--- a/nmigen_boards/tinyfpga_bx.py
+++ b/nmigen_boards/tinyfpga_bx.py
@@ -26,8 +26,7 @@ class TinyFPGABXPlatform(LatticeICE40Platform):
         ),
 
         *SPIFlashResources(0,
-            cs_n="F7", clk="G7",
-            mosi="G6", miso="H7", wp_n="H4", hold_n="J8",
+            cs="F7", clk="G7", mosi="G6", miso="H7", wp="H4", hold="J8",
             attrs=Attrs(IO_STANDARD="SB_LVCMOS33")),
     ]
     connectors = [