radeonsi/nir: implement subgroup system values for SPIR-V
authorMarek Olšák <marek.olsak@amd.com>
Thu, 7 Nov 2019 00:06:09 +0000 (19:06 -0500)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 28 Nov 2019 00:28:23 +0000 (19:28 -0500)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
src/gallium/auxiliary/tgsi/tgsi_scan.h
src/gallium/drivers/radeonsi/si_compute.c
src/gallium/drivers/radeonsi/si_shader.c
src/gallium/drivers/radeonsi/si_shader_nir.c

index c446ee5e65a0a8d8cba6890e971cc38fd3fb027f..ca8d90a801686556a679d9d3162d884a7f21c763 100644 (file)
@@ -126,6 +126,7 @@ struct tgsi_shader_info
    boolean uses_block_id[3];
    boolean uses_block_size;
    boolean uses_grid_size;
+   boolean uses_subgroup_info;
    boolean writes_position;
    boolean writes_psize;
    boolean writes_clipvertex;
index 4cadf3e808d21986fd6ee799389a1214217f8edd..7abea1927cdbb0de73c4723ec51a783dcae34cb4 100644 (file)
@@ -198,6 +198,7 @@ static void si_create_compute_state_async(void *job, int thread_index)
                        S_00B84C_TGID_X_EN(sel->info.uses_block_id[0]) |
                        S_00B84C_TGID_Y_EN(sel->info.uses_block_id[1]) |
                        S_00B84C_TGID_Z_EN(sel->info.uses_block_id[2]) |
+                       S_00B84C_TG_SIZE_EN(sel->info.uses_subgroup_info) |
                        S_00B84C_TIDIG_COMP_CNT(sel->info.uses_thread_id[2] ? 2 :
                                                sel->info.uses_thread_id[1] ? 1 : 0) |
                        S_00B84C_LDS_SIZE(shader->config.lds_size);
index bad2bfdf130b72ffa0fdc79154e40df840d1b654..b9a70a382cdb98a082c8113620313b25538c101f 100644 (file)
@@ -4904,13 +4904,17 @@ static void create_function(struct si_shader_context *ctx)
                                   &ctx->cs_user_data);
                }
 
+               /* Hardware SGPRs. */
                for (i = 0; i < 3; i++) {
                        if (shader->selector->info.uses_block_id[i]) {
                                ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
                                           &ctx->args.workgroup_ids[i]);
                        }
                }
+               if (shader->selector->info.uses_subgroup_info)
+                       ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->args.tg_size);
 
+               /* Hardware VGPRs. */
                ac_add_arg(&ctx->args, AC_ARG_VGPR, 3, AC_ARG_INT,
                           &ctx->args.local_invocation_ids);
                break;
index 850be07ac40941d5b8d36336e3b1f497d96b3080..342abe36dd0b5fb9c209af727d41d270718a3a56 100644 (file)
@@ -236,6 +236,11 @@ static void scan_instruction(const struct nir_shader *nir,
                case nir_intrinsic_load_num_work_groups:
                        info->uses_grid_size = true;
                        break;
+               case nir_intrinsic_load_local_invocation_index:
+               case nir_intrinsic_load_subgroup_id:
+               case nir_intrinsic_load_num_subgroups:
+                       info->uses_subgroup_info = true;
+                       break;
                case nir_intrinsic_load_local_group_size:
                        /* The block size is translated to IMM with a fixed block size. */
                        if (info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)