boolean uses_block_id[3];
boolean uses_block_size;
boolean uses_grid_size;
+ boolean uses_subgroup_info;
boolean writes_position;
boolean writes_psize;
boolean writes_clipvertex;
S_00B84C_TGID_X_EN(sel->info.uses_block_id[0]) |
S_00B84C_TGID_Y_EN(sel->info.uses_block_id[1]) |
S_00B84C_TGID_Z_EN(sel->info.uses_block_id[2]) |
+ S_00B84C_TG_SIZE_EN(sel->info.uses_subgroup_info) |
S_00B84C_TIDIG_COMP_CNT(sel->info.uses_thread_id[2] ? 2 :
sel->info.uses_thread_id[1] ? 1 : 0) |
S_00B84C_LDS_SIZE(shader->config.lds_size);
&ctx->cs_user_data);
}
+ /* Hardware SGPRs. */
for (i = 0; i < 3; i++) {
if (shader->selector->info.uses_block_id[i]) {
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
&ctx->args.workgroup_ids[i]);
}
}
+ if (shader->selector->info.uses_subgroup_info)
+ ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->args.tg_size);
+ /* Hardware VGPRs. */
ac_add_arg(&ctx->args, AC_ARG_VGPR, 3, AC_ARG_INT,
&ctx->args.local_invocation_ids);
break;
case nir_intrinsic_load_num_work_groups:
info->uses_grid_size = true;
break;
+ case nir_intrinsic_load_local_invocation_index:
+ case nir_intrinsic_load_subgroup_id:
+ case nir_intrinsic_load_num_subgroups:
+ info->uses_subgroup_info = true;
+ break;
case nir_intrinsic_load_local_group_size:
/* The block size is translated to IMM with a fixed block size. */
if (info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)