*
* @return a reference to the data port
*/
- virtual MasterPort &getDataPort() = 0;
+ virtual Port &getDataPort() = 0;
/**
* Returns a sendFunctional delegate for use with port proxies.
virtual PortProxy::SendFunctionalFunc
getSendFunctional()
{
- MasterPort &port = getDataPort();
- return [&port](PacketPtr pkt)->void { port.sendFunctional(pkt); };
+ auto port = dynamic_cast<MasterPort *>(&getDataPort());
+ assert(port);
+ return [port](PacketPtr pkt)->void { port->sendFunctional(pkt); };
}
/**
*
* @return a reference to the instruction port
*/
- virtual MasterPort &getInstPort() = 0;
+ virtual Port &getInstPort() = 0;
/** Reads this CPU's ID. */
int cpuId() const { return _cpuId; }
void setDcachePort(MasterPort *dcache_port);
- MasterPort &getDataPort() override
+ Port &
+ getDataPort() override
{
// the checker does not have ports on its own so return the
// data port of the actual CPU core
return *dcachePort;
}
- MasterPort &getInstPort() override
+ Port &
+ getInstPort() override
{
// the checker does not have ports on its own so return the
// data port of the actual CPU core
void verifyMemoryMode() const override;
- MasterPort &getDataPort() override { return dataPort; }
- MasterPort &getInstPort() override { return instPort; }
+ Port &getDataPort() override { return dataPort; }
+ Port &getInstPort() override { return instPort; }
void wakeup(ThreadID tid = 0) override;
void activateContext(ThreadID thread_num) override;
return new MinorCPU(this);
}
-MasterPort &MinorCPU::getInstPort()
+Port &
+MinorCPU::getInstPort()
{
return pipeline->getInstPort();
}
-MasterPort &MinorCPU::getDataPort()
+Port &
+MinorCPU::getDataPort()
{
return pipeline->getDataPort();
}
Enums::ThreadPolicy threadPolicy;
protected:
/** Return a reference to the data port. */
- MasterPort &getDataPort() override;
+ Port &getDataPort() override;
/** Return a reference to the instruction port. */
- MasterPort &getInstPort() override;
+ Port &getInstPort() override;
public:
MinorCPU(MinorCPUParams *params);
}
/** Used by the fetch unit to get a hold of the instruction port. */
- MasterPort &
+ Port &
getInstPort() override
{
return this->fetch.getInstPort();
}
/** Get the dcache port (used to find block size for translations). */
- MasterPort &
+ Port &
getDataPort() override
{
return this->iew.ldstQueue.getDataPort();
protected:
/** Return a reference to the data port. */
- MasterPort &getDataPort() override { return dcachePort; }
+ Port &getDataPort() override { return dcachePort; }
/** Return a reference to the instruction port. */
- MasterPort &getInstPort() override { return icachePort; }
+ Port &getInstPort() override { return icachePort; }
/** Perform snoop for other cpu-local thread contexts. */
void threadSnoop(PacketPtr pkt, ThreadID sender);
protected:
/** Return a reference to the data port. */
- MasterPort &getDataPort() override { return dcachePort; }
+ Port &getDataPort() override { return dcachePort; }
/** Return a reference to the instruction port. */
- MasterPort &getInstPort() override { return icachePort; }
+ Port &getInstPort() override { return icachePort; }
public:
public:
/** Used to get a reference to the icache port. */
- MasterPort &getInstPort() { return icachePort; }
+ Port &getInstPort() { return icachePort; }
/** Used to get a reference to the dcache port. */
- MasterPort &getDataPort() { return dcachePort; }
+ Port &getDataPort() { return dcachePort; }
void regStats();
};