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cache: set dirty bit on swaps (oops!)
author
Steve Reinhardt
<steve.reinhardt@amd.com>
Thu, 12 Mar 2009 06:05:26 +0000
(23:05 -0700)
committer
Steve Reinhardt
<steve.reinhardt@amd.com>
Thu, 12 Mar 2009 06:05:26 +0000
(23:05 -0700)
src/mem/cache/cache_impl.hh
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diff --git
a/src/mem/cache/cache_impl.hh
b/src/mem/cache/cache_impl.hh
index 618e00569d6e48af2464f9bd8af5be9f79963c2a..a78fd363792c510d67707695eb01d4cf9dec966d 100644
(file)
--- a/
src/mem/cache/cache_impl.hh
+++ b/
src/mem/cache/cache_impl.hh
@@
-149,8
+149,10
@@
Cache<TagStore>::cmpAndSwap(BlkType *blk, PacketPtr pkt)
panic("Invalid size for conditional read/write\n");
}
- if (overwrite_mem)
+ if (overwrite_mem)
{
std::memcpy(blk_data, &overwrite_val, pkt->getSize());
+ blk->status |= BlkDirty;
+ }
}