Add synth_xilinx -nomux option

diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v
index 3c4d8f4cd877164ae4f02ee78ca3ed88c4450d88..e71d4bafb0238bf6eab2fb3069e33940cb0aa682 100644 (file)
--- a/techlibs/xilinx/cells_map.v
+++ b/techlibs/xilinx/cells_map.v
@@ -142,6 +142,7 @@ module \$__XILINX_SHREG_ (input C, input D, input [31:0] L, input E, output Q, o
   endgenerate
 endmodule
 
+`ifndef NO_MUXFN
 module \$shiftx (A, B, Y);
   parameter A_SIGNED = 0;
   parameter B_SIGNED = 0;
@@ -219,3 +220,4 @@ module \$shiftx (A, B, Y);
     end
   endgenerate
 endmodule
+`endif // NO_MUXFN

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 5de2803e97f4c98e87082699844f2aff68bdb837..04b0dabca45ea0f6e850a113031aa7a91438f8a3 100644 (file)
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -72,6 +72,9 @@ struct SynthXilinxPass : public Pass
                log("    -nosrl\n");
                log("        disable inference of shift registers\n");
                log("\n");
+               log("    -nomux\n");
+               log("        disable inference of wide multiplexers\n");
+               log("\n");
                log("    -run <from_label>:<to_label>\n");
                log("        only run the commands between the labels (see below). an empty\n");
                log("        from label is synonymous to 'begin', and empty to label is\n");
@@ -119,7 +122,7 @@ struct SynthXilinxPass : public Pass
                log("        opt -fast\n");
                log("\n");
                log("    map_cells:\n");
-               log("        pmux2shiftx\n");
+               log("        pmux2shiftx (without '-nosrl' and '-nomux' only)\n");
                log("        simplemap t:$dff t:$dffe (without '-nosrl' only)\n");
                log("        opt_expr -mux_undef (without '-nosrl' only)\n");
                log("        shregmap -tech xilinx -minlen 3 (without '-nosrl' only)\n");
@@ -161,6 +164,7 @@ struct SynthXilinxPass : public Pass
                bool nobram = false;
                bool nodram = false;
                bool nosrl = false;
+               bool nomux = false;
 
                size_t argidx;
                for (argidx = 1; argidx < args.size(); argidx++)
@@ -209,6 +213,10 @@ struct SynthXilinxPass : public Pass
                                nosrl = true;
                 continue;
             }
+                       if (args[argidx] == "-nomux") {
+                               nomux = true;
+                               continue;
+                       }
                        if (args[argidx] == "-abc9") {
                                abc = "abc9";
                                continue;
@@ -291,8 +299,9 @@ struct SynthXilinxPass : public Pass
                        // shregmap -tech xilinx can cope with $shiftx and $mux
                        //   cells for identifying variable-length shift registers,
                        //   so attempt to convert $pmux-es to the former
-                       // Also: wide multiplexers inference benefits from this too
-                       Pass::call(design, "pmux2shiftx");
+                       // Also: wide multiplexer inference benefits from this too
+                       if (!nosrl || !nomux)
+                               Pass::call(design, "pmux2shiftx");
 
                        if (!nosrl) {
                                // shregmap operates on bit-level flops, not word-level,
@@ -305,7 +314,10 @@ struct SynthXilinxPass : public Pass
                                Pass::call(design, "shregmap -tech xilinx -minlen 3");
                        }
 
-                       Pass::call(design, "techmap -map +/xilinx/cells_map.v");
+                       std::string define;
+                       if (nomux)
+                               define += " -D NO_MUXFN";
+                       Pass::call(design, "techmap" + define + " -map +/xilinx/cells_map.v");
                        Pass::call(design, "clean");
                }