extend.texi (X86 Built-in Functions): Missed fragment from my previous commit commit.

	* doc/extend.texi (X86 Built-in Functions): Missed fragment from
	my previous commit commit.

From-SVN: r133178

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ade053e53c42edc75cd0a74a7ae3ca6208f0d81f..7eb3e89ad008f0489d4cb674e28e7358cb3a9026 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -4,7 +4,8 @@
        __builtin_ia32_psrl?, __builtin_ia32_psra?, __builtin_ia32_psll?i,
        __builtin_ia32_psrl?i, __builtin_ia32_psra?i, __builtin_ia32_psll?128,
        __builtin_ia32_psrl?128, __builtin_ia32_psra?128]: Fix the mode of
-       input arguments and the mode of return value.
+       input arguments and the mode of return value.  Built-in functions
+       that operate on whole 64-bit MMX register now use V1DI mode.
 
 2008-03-13  Alon Dayan  <alond@il.ibm.com>
            Olga Golovanevsky  <olga@il.ibm.com>

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 69d38688db2737df2ca4573c6b0b251375e85ce7..53ec6efa6177e866412ce7d3b00d7da12e85271f 100644 (file)
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -7406,7 +7406,7 @@ The following machine modes are available for use with MMX built-in functions
 (@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32-bit integers,
 @code{V4HI} for a vector of four 16-bit integers, and @code{V8QI} for a
 vector of eight 8-bit integers.  Some of the built-in functions operate on
-MMX registers as a whole 64-bit entity, these use @code{DI} as their mode.
+MMX registers as a whole 64-bit entity, these use @code{V1DI} as their mode.
 
 If 3Dnow extensions are enabled, @code{V2SF} is used as a mode for a vector
 of two 32-bit floating point values.