# root instead of appended.
def generateMemNode(mem_range):
- node = FdtNode("memory@%x" % long(mem_range.start))
+ node = FdtNode("memory@%x" % int(mem_range.start))
node.append(FdtPropertyStrings("device_type", ["memory"]))
node.append(FdtPropertyWords("reg",
state.addrCells(mem_range.start) +
def generateBasicPioDeviceNode(self, state, name, pio_addr,
size, interrupts = None):
- node = FdtNode("%s@%x" % (name, long(pio_addr)))
+ node = FdtNode("%s@%x" % (name, int(pio_addr)))
node.append(FdtPropertyWords("reg",
state.addrCells(pio_addr) +
state.sizeCells(size) ))
idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID")
def generateDeviceTree(self, state):
- node = FdtNode("sysreg@%x" % long(self.pio_addr))
+ node = FdtNode("sysreg@%x" % int(self.pio_addr))
node.appendCompatible("arm,vexpress-sysreg")
node.append(FdtPropertyWords("reg",
state.addrCells(self.pio_addr) +
def generateDeviceTree(self, state):
phandle = state.phandle(self)
- node = FdtNode("osc@" + format(long(phandle), 'x'))
+ node = FdtNode("osc@" + format(int(phandle), 'x'))
node.appendCompatible("arm,vexpress-osc")
node.append(FdtPropertyWords("arm,vexpress-sysreg,func",
[0x1, int(self.device)]))
super(MmioSRAM, self).__init__(**kwargs)
def generateDeviceTree(self, state):
- node = FdtNode("sram@%x" % long(self.range.start))
+ node = FdtNode("sram@%x" % int(self.range.start))
node.appendCompatible(["mmio-sram"])
node.append(FdtPropertyWords("reg",
state.addrCells(self.range.start) +
def generateDeviceTree(self, state):
reg_addr = self.reg_map.start
reg_size = self.reg_map.size()
- node = FdtNode("smmuv3@%x" % long(reg_addr))
+ node = FdtNode("smmuv3@%x" % int(reg_addr))
node.appendCompatible("arm,smmu-v3")
node.append(FdtPropertyWords("reg",
state.addrCells(reg_addr) +
scp = Param.Scp(Parent.any, "System Control Processor")
def generateDeviceTree(self, state):
- node = FdtNode("mailbox@%x" % long(self.pio_addr))
+ node = FdtNode("mailbox@%x" % int(self.pio_addr))
node.appendCompatible(["arm,mhu", "arm,primecell"])
node.append(FdtPropertyWords("reg",
state.addrCells(self.pio_addr) +