Added english language description and brackets for lhbrx instruction

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 02553435f4a0a9d8c564a13d278b64e323c22c87..15774d3cab12a09dd80ab3f4c74897e8ed99a18b 100644 (file)
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -660,6 +660,14 @@ Pseudo-code:
     load_data <- MEM(EA, 2)
     RT <- [0]*48 || load_data[8:15] || load_data[0:7]
 
+Description:
+
+    Let the effective address (EA) be the sum (RA|0)+(RB).
+    Bits 0:7 of the halfword in storage addressed by EA are
+    loaded into RT 56:63 . Bits 8:15 of the halfword in storage
+    addressed by EA are loaded into RT[48:55] . RT[0:47] are
+    set to 0.
+
 Special Registers Altered:
 
     None