re PR rtl-optimization/79901 (ICE in prepare_cmp_insn, at optabs.c:3904)
authorJakub Jelinek <jakub@redhat.com>
Tue, 7 Mar 2017 08:11:30 +0000 (09:11 +0100)
committerJakub Jelinek <jakub@gcc.gnu.org>
Tue, 7 Mar 2017 08:11:30 +0000 (09:11 +0100)
PR rtl-optimization/79901
* config/i386/sse.md (*avx512bw_<code><mode>3<mask_name>): Renamed to
...
(*avx512f_<code><mode>3<mask_name>): ... this.
(<code><mode>3 with maxmin code iterator): Use VI8_AVX2_AVX512F
iterator instead of VI8_AVX2_AVX512BW.

* gcc.target/i386/pr79901.c: New test.

From-SVN: r245947

gcc/ChangeLog
gcc/config/i386/sse.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr79901.c [new file with mode: 0644]

index efeee1a1796404ab6a8c9e8cef130308aedc53f3..227b48aca6ab926b06a03b4644b7478c87190c9a 100644 (file)
@@ -1,5 +1,12 @@
 2017-03-07  Jakub Jelinek  <jakub@redhat.com>
 
+       PR rtl-optimization/79901
+       * config/i386/sse.md (*avx512bw_<code><mode>3<mask_name>): Renamed to
+       ...
+       (*avx512f_<code><mode>3<mask_name>): ... this.
+       (<code><mode>3 with maxmin code iterator): Use VI8_AVX2_AVX512F
+       iterator instead of VI8_AVX2_AVX512BW.
+
        PR rtl-optimization/79901
        * expr.c (expand_expr_real_2): For vector MIN/MAX, if there is no
        min/max expander, expand it using expand_vec_cond_expr.
index ac63235e38f92296143011e4a300050edb18724c..5cca4f1d4fd942cbcdabcbe5faa1182d3371ca0e 100644 (file)
   "TARGET_AVX512F"
   "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
 
-(define_insn "*avx512bw_<code><mode>3<mask_name>"
+(define_insn "*avx512f_<code><mode>3<mask_name>"
   [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
        (maxmin:VI48_AVX512VL
          (match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v")
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_expand "<code><mode>3"
-  [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand")
-       (maxmin:VI8_AVX2_AVX512BW
-         (match_operand:VI8_AVX2_AVX512BW 1 "register_operand")
-         (match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))]
+  [(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand")
+       (maxmin:VI8_AVX2_AVX512F
+         (match_operand:VI8_AVX2_AVX512F 1 "register_operand")
+         (match_operand:VI8_AVX2_AVX512F 2 "register_operand")))]
   "TARGET_SSE4_2"
 {
   if (TARGET_AVX512F
index 9c8b87e90c70218646050844d6b46d2603f1dc7a..b927b5a2976279644208f673eeb5e7c5031332ca 100644 (file)
@@ -1,5 +1,8 @@
 2017-03-07  Jakub Jelinek  <jakub@redhat.com>
 
+       PR rtl-optimization/79901
+       * gcc.target/i386/pr79901.c: New test.
+
        PR sanitizer/79897
        * c-c++-common/ubsan/pr79897.c: New test.
 
diff --git a/gcc/testsuite/gcc.target/i386/pr79901.c b/gcc/testsuite/gcc.target/i386/pr79901.c
new file mode 100644 (file)
index 0000000..6fdcf76
--- /dev/null
@@ -0,0 +1,22 @@
+/* PR rtl-optimization/79901 */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f -fno-ssa-phiopt" } */
+
+unsigned int
+foo (const unsigned long long x)
+{
+  if (x < 0)
+    return 0;
+  else if ( x > ~0U)
+    return ~0U;
+  else
+    return (unsigned int) x;
+}
+
+void
+bar (unsigned x, unsigned int *y, unsigned int z)
+{
+  unsigned i;
+  for (i = 0; i < x; i++)
+    y[i] = foo (y[i] * (unsigned long long) z);
+}