install: all
install -d $(instbasedir)/share/riscv-tests/isa
install -d $(instbasedir)/share/riscv-tests/benchmarks
- install -p -m 644 `find $(isa_src_dir) -maxdepth 1 -type f` $(instbasedir)/share/riscv-tests/isa
- install -p -m 644 `find $(bmarkdir) -maxdepth 1 -type f` $(instbasedir)/share/riscv-tests/benchmarks
+ install -p -m 644 `find isa -maxdepth 1 -type f` $(instbasedir)/share/riscv-tests/isa
+ install -p -m 644 `find benchmarks -maxdepth 1 -type f` $(instbasedir)/share/riscv-tests/benchmarks
benchmarks:
mkdir -p benchmarks
-Subproject commit b7528b89c8673bf38e5e4ec1e8f037ec2bcbee24
+Subproject commit ef1457fa7a3bf3fd58dadd0f30002828b353e573
$(1)_tests += $$($(1)_pm_tests)
$$($(1)_v_tests): $(1)-v-%: $(1)/%.S
- $$(RISCV_GCC) $(2) $$(RISCV_GCC_OPTS) -std=gnu99 -O2 -I$(src_dir)/../env/v -I$(src_dir)/macros/scalar -T$(src_dir)/../env/v/link.ld $(src_dir)/../env/v/entry.S $(src_dir)/../env/v/vm.c $$< -lc -o $$@
+ $$(RISCV_GCC) $(2) $$(RISCV_GCC_OPTS) -std=gnu99 -O2 -I$(src_dir)/../env/v -I$(src_dir)/macros/scalar -T$(src_dir)/../env/v/link.ld $(src_dir)/../env/v/entry.S $(src_dir)/../env/v/*.c $$< -lc -o $$@
$(1)_tests += $$($(1)_v_tests)
$(1)_tests_dump = $$(addsuffix .dump, $$($(1)_tests))
rv32ui_sc_tests = \
simple \
add addi \
- amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoswap_w \
+ amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoxor_w amoswap_w \
and andi \
auipc \
beq bge bgeu blt bltu bne \
rv32ui_p_tests = $(addprefix rv32ui-p-, $(rv32ui_sc_tests))
rv32ui_pt_tests = $(addprefix rv32ui-pt-, $(rv32ui_sc_tests))
rv32ui_pm_tests = $(addprefix rv32ui-pm-, $(rv32ui_mc_tests))
+rv32ui_v_tests = $(addprefix rv32ui-v-, $(rv32ui_sc_tests))
-spike_tests += $(rv32ui_p_tests) $(rv32ui_pt_tests) $(rv32ui_pm_tests)
+spike32_tests += $(rv32ui_p_tests) $(rv32ui_pt_tests) $(rv32ui_pm_tests) $(rv32ui_v_tests)
--- /dev/null
+# See LICENSE for license details.
+
+#*****************************************************************************
+# amoxor_w.S
+#-----------------------------------------------------------------------------
+#
+# Test amoxor.w instruction.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+
+RVTEST_RV32U
+RVTEST_CODE_BEGIN
+
+ TEST_CASE(2, a4, 0x80000000, \
+ li a0, 0x80000000; \
+ li a1, 0xfffff800; \
+ la a3, amo_operand; \
+ sw a0, 0(a3); \
+ nop; nop; nop; nop; \
+ nop; nop; nop; nop; \
+ nop; nop; nop; nop; \
+ nop; nop; nop; nop; \
+ nop; nop; nop; nop; \
+ nop; nop; nop; nop; \
+ nop; nop; nop; nop; \
+ amoxor.w a4, a1, 0(a3); \
+ )
+
+ TEST_CASE(3, a5, 0x7ffff800, lw a5, 0(a3))
+
+ # try again after a cache miss
+ TEST_CASE(4, a4, 0x7ffff800, \
+ li a1, 0xc0000001; \
+ li a4, 16384; \
+ add a5, a3, a4; \
+ lw x0, 0(a5); \
+ add a5, a5, a4; \
+ lw x0, 0(a5); \
+ add a5, a5, a4; \
+ lw x0, 0(a5); \
+ add a5, a5, a4; \
+ lw x0, 0(a5); \
+ amoxor.w a4, a1, 0(a3); \
+ )
+
+ TEST_CASE(5, a5, 0xbffff801, lw a5, 0(a3))
+
+ TEST_PASSFAIL
+
+RVTEST_CODE_END
+
+ .data
+RVTEST_DATA_BEGIN
+
+ TEST_DATA
+
+RVTEST_DATA_END
+
+ .bss
+ .align 3
+amo_operand:
+ .dword 0
+ .skip 65536