Fix improper shift for loading address
authorAndrew Schultz <alschult@umich.edu>
Tue, 3 Feb 2004 20:09:09 +0000 (15:09 -0500)
committerAndrew Schultz <alschult@umich.edu>
Tue, 3 Feb 2004 20:09:09 +0000 (15:09 -0500)
system/alpha/palcode/platform_m5.s

index 9f73767c98df43f83e0c7591cd5d6c7429f95e84..f457147ead021daa5e453874b21d53bf264ae263 100644 (file)
@@ -799,9 +799,9 @@ sys_int_20:
         or      r31,3,r16                       // a0 means it is a I/O interrupt
         
         bis     r31,0x801,r8
-        sll     r8,4,r8
+        sll     r8,16,r8
         bis     r8,0xa000,r8
-        sll     r8,4,r8
+        sll     r8,16,r8
         bis     r8,0x80,r8
         ldl_p   r9, 0(r8)                       // read the MISC register