mips.c (mips_conditional_register_usage): Do not use t[0-7] registers in MIPS16 mode...
authorSteve Ellcey <sellcey@mips.com>
Thu, 11 Jul 2013 22:25:44 +0000 (22:25 +0000)
committerSteve Ellcey <sje@gcc.gnu.org>
Thu, 11 Jul 2013 22:25:44 +0000 (22:25 +0000)
2013-07-11  Steve Ellcey  <sellcey@mips.com>

* config/mips/mips.c (mips_conditional_register_usage): Do not
use t[0-7] registers in MIPS16 mode when optimizing for size.

From-SVN: r200914

gcc/ChangeLog
gcc/config/mips/mips.c

index 613ede4f8fa5b90cf0d4790a29399fdea32546d4..1d8c05a480717289cf6de95f25ab57cc07793c84 100644 (file)
@@ -1,3 +1,8 @@
+2013-07-11  Steve Ellcey  <sellcey@mips.com>
+
+       * config/mips/mips.c (mips_conditional_register_usage): Do not
+       use t[0-7] registers in MIPS16 mode when optimizing for size.
+
 2013-07-11  Sriraman Tallam  <tmsriram@google.com>
 
        * config/i386/i386.c (dispatch_function_versions): Fix array
index 3c5469b4b16e0fab385fcefb3c8b1014cbace0af..3c7e4391014d0376d70216610d09476195ade80e 100644 (file)
@@ -17199,10 +17199,17 @@ mips_conditional_register_usage (void)
     }
   if (TARGET_MIPS16)
     {
-      /* In MIPS16 mode, we permit the $t temporary registers to be used
-        for reload.  We prohibit the unused $s registers, since they
+      /* In MIPS16 mode, we prohibit the unused $s registers, since they
         are call-saved, and saving them via a MIPS16 register would
-        probably waste more time than just reloading the value.  */
+        probably waste more time than just reloading the value.
+
+        We permit the $t temporary registers when optimizing for speed
+        but not when optimizing for space because using them results in
+        code that is larger (but faster) then not using them.  We do
+        allow $24 (t8) because it is used in CMP and CMPI instructions
+        and $25 (t9) because it is used as the function call address in
+        SVR4 PIC code.  */
+
       fixed_regs[18] = call_used_regs[18] = 1;
       fixed_regs[19] = call_used_regs[19] = 1;
       fixed_regs[20] = call_used_regs[20] = 1;
@@ -17212,6 +17219,17 @@ mips_conditional_register_usage (void)
       fixed_regs[26] = call_used_regs[26] = 1;
       fixed_regs[27] = call_used_regs[27] = 1;
       fixed_regs[30] = call_used_regs[30] = 1;
+      if (optimize_size)
+       {
+         fixed_regs[8] = call_used_regs[8] = 1;
+         fixed_regs[9] = call_used_regs[9] = 1;
+         fixed_regs[10] = call_used_regs[10] = 1;
+         fixed_regs[11] = call_used_regs[11] = 1;
+         fixed_regs[12] = call_used_regs[12] = 1;
+         fixed_regs[13] = call_used_regs[13] = 1;
+         fixed_regs[14] = call_used_regs[14] = 1;
+         fixed_regs[15] = call_used_regs[15] = 1;
+       }
 
       /* Do not allow HI and LO to be treated as register operands.
         There are no MTHI or MTLO instructions (or any real need