/* lower ALU operations */
// TODO: implement logic64 in aco, it's more effective for sgprs
- nir_lower_int64(nir, (nir_lower_int64_options) (nir_lower_imul64 |
- nir_lower_imul_high64 |
- nir_lower_imul_2x32_64 |
- nir_lower_divmod64 |
- nir_lower_logic64 |
- nir_lower_minmax64 |
- nir_lower_iabs64));
+ nir_lower_int64(nir, nir->options->lower_int64_options);
nir_opt_idiv_const(nir, 32);
nir_lower_idiv(nir, nir_lower_idiv_precise);
.lower_rotate = true,
.max_unroll_iterations = 32,
.use_interpolated_input_intrinsics = true,
+ /* nir_lower_int64() isn't actually called for the LLVM backend, but
+ * this helps the loop unrolling heuristics. */
+ .lower_int64_options = nir_lower_imul64 |
+ nir_lower_imul_high64 |
+ nir_lower_imul_2x32_64 |
+ nir_lower_divmod64 |
+ nir_lower_minmax64 |
+ nir_lower_iabs64,
};
static const struct nir_shader_compiler_options nir_options_aco = {
.lower_rotate = true,
.max_unroll_iterations = 32,
.use_interpolated_input_intrinsics = true,
+ .lower_int64_options = nir_lower_imul64 |
+ nir_lower_imul_high64 |
+ nir_lower_imul_2x32_64 |
+ nir_lower_divmod64 |
+ nir_lower_logic64 |
+ nir_lower_minmax64 |
+ nir_lower_iabs64,
};
bool