fixup_vp_regfootprint(struct fd3_shader_variant *so)
{
unsigned i;
- for (i = 0; i < so->inputs_count; i++)
- so->info.max_reg = MAX2(so->info.max_reg, (so->inputs[i].regid + 3) >> 2);
- for (i = 0; i < so->outputs_count; i++)
- so->info.max_reg = MAX2(so->info.max_reg, (so->outputs[i].regid + 3) >> 2);
+ for (i = 0; i < so->inputs_count; i++) {
+ if (so->inputs[i].compmask) {
+ uint32_t regid = (so->inputs[i].regid + 3) >> 2;
+ so->info.max_reg = MAX2(so->info.max_reg, regid);
+ }
+ }
+ for (i = 0; i < so->outputs_count; i++) {
+ uint32_t regid = (so->outputs[i].regid + 3) >> 2;
+ so->info.max_reg = MAX2(so->info.max_reg, regid);
+ }
}
static struct fd3_shader_variant *
struct ir3_instruction *end =
ir3_instr_create(block, 0, OPC_END);
struct ir3_instruction *last_input = NULL;
- regmask_t needs_ss_war;
+ regmask_t needs_ss_war; /* write after read */
regmask_t needs_ss;
regmask_t needs_sy;