i386: Restore Skylake SImode hard register store cost

On Skylake, we should move integer register to SSE register without
going through memory.  This patch restores Skylake SImode hard register
store cost to 6.

gcc/

	PR target/90878
	* config/i386/x86-tune-costs.h (skylake_cost): Restore SImode
	hard register store cost to 6.

gcc/testsuite/

	PR target/90878
	* gcc.target/i386/pr90878.c: New test.

From-SVN: r275906

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d74b19f7109770bf1c05b96f8c965951efabb0b2..0a20e8644dba130168b5aa63d2a429f73f48def1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-09-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/90878
+       * config/i386/x86-tune-costs.h (skylake_cost): Restore SImode
+       hard register store cost to 6.
+
 2019-09-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/91446

diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h
index 42c9c2530c981218fc3ae6a8353b0cef217136b4..8e6f4b5d3ea500a2a02f4d628fc8fdf71d78039c 100644 (file)
--- a/gcc/config/i386/x86-tune-costs.h
+++ b/gcc/config/i386/x86-tune-costs.h
@@ -1594,7 +1594,7 @@ struct processor_costs skylake_cost = {
   {4, 4, 4},                           /* cost of loading integer registers
                                           in QImode, HImode and SImode.
                                           Relative to reg-reg move (2).  */
-  {6, 6, 3},                           /* cost of storing integer registers */
+  {6, 6, 6},                           /* cost of storing integer registers */
   2,                                   /* cost of reg,reg fld/fst */
   {6, 6, 8},                           /* cost of loading fp registers
                                           in SFmode, DFmode and XFmode */

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8ea581d775e8818525082344da2dfcae09e276eb..48e91d9f8ca7a51c8dbc92d1073bc39d488aece8 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-09-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/90878
+       * gcc.target/i386/pr90878.c: New test.
+
 2019-09-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/91446

diff --git a/gcc/testsuite/gcc.target/i386/pr90878.c b/gcc/testsuite/gcc.target/i386/pr90878.c
new file mode 100644 (file)
index 0000000..18dd64b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr90878.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake" } */
+
+union ieee754_float
+  {
+    float f;
+
+    struct
+      {
+       unsigned int mantissa:23;
+       unsigned int exponent:8;
+       unsigned int negative:1;
+      } ieee;
+};
+
+double
+foo (float f)
+{
+  union ieee754_float u;
+  u.f = f;
+  u.ieee.negative = 0;
+  return u.f;
+}
+
+/* { dg-final { scan-assembler-not "vcvtss2sd\[^\\n\]*\\\(%.sp\\\)" } } */