Mips was missing a few stats

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt
index 23e6b5f2cd6be3433a9c7d449a93a5c61523ef33..7c3074e0aea4f13dc9f0b39996b4408ff1937c29 100644 (file)
--- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt
+++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt
@@ -1,18 +1,54 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                   9753                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 173424                       # Number of bytes of host memory used
-host_seconds                                     0.58                       # Real time elapsed on the host
-host_tick_rate                                4872477                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 493457                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 191128                       # Number of bytes of host memory used
+host_seconds                                     0.01                       # Real time elapsed on the host
+host_tick_rate                              241461749                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                        5656                       # Number of instructions simulated
 sim_seconds                                  0.000003                       # Number of seconds simulated
 sim_ticks                                     2828000                       # Number of ticks simulated
+system.cpu.dtb.accesses                             0                       # DTB accesses
+system.cpu.dtb.hits                                 0                       # DTB hits
+system.cpu.dtb.misses                               0                       # DTB misses
+system.cpu.dtb.read_accesses                        0                       # DTB read accesses
+system.cpu.dtb.read_hits                            0                       # DTB read hits
+system.cpu.dtb.read_misses                          0                       # DTB read misses
+system.cpu.dtb.write_accesses                       0                       # DTB write accesses
+system.cpu.dtb.write_hits                           0                       # DTB write hits
+system.cpu.dtb.write_misses                         0                       # DTB write misses
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
+system.cpu.itb.accesses                             0                       # DTB accesses
+system.cpu.itb.hits                                 0                       # DTB hits
+system.cpu.itb.misses                               0                       # DTB misses
+system.cpu.itb.read_accesses                        0                       # DTB read accesses
+system.cpu.itb.read_hits                            0                       # DTB read hits
+system.cpu.itb.read_misses                          0                       # DTB read misses
+system.cpu.itb.write_accesses                       0                       # DTB write accesses
+system.cpu.itb.write_hits                           0                       # DTB write hits
+system.cpu.itb.write_misses                         0                       # DTB write misses
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.numCycles                             5657                       # number of cpu cycles simulated
 system.cpu.num_insts                             5656                       # Number of instructions executed
 system.cpu.num_refs                              2055                       # Number of memory references
+system.cpu.tlb.accesses                             0                       # DTB accesses
+system.cpu.tlb.accesses                             0                       # DTB accesses
+system.cpu.tlb.hits                                 0                       # DTB hits
+system.cpu.tlb.hits                                 0                       # DTB hits
+system.cpu.tlb.misses                               0                       # DTB misses
+system.cpu.tlb.misses                               0                       # DTB misses
+system.cpu.tlb.read_accesses                        0                       # DTB read accesses
+system.cpu.tlb.read_accesses                        0                       # DTB read accesses
+system.cpu.tlb.read_hits                            0                       # DTB read hits
+system.cpu.tlb.read_hits                            0                       # DTB read hits
+system.cpu.tlb.read_misses                          0                       # DTB read misses
+system.cpu.tlb.read_misses                          0                       # DTB read misses
+system.cpu.tlb.write_accesses                       0                       # DTB write accesses
+system.cpu.tlb.write_accesses                       0                       # DTB write accesses
+system.cpu.tlb.write_hits                           0                       # DTB write hits
+system.cpu.tlb.write_hits                           0                       # DTB write hits
+system.cpu.tlb.write_misses                         0                       # DTB write misses
+system.cpu.tlb.write_misses                         0                       # DTB write misses
 system.cpu.workload.PROG:num_syscalls              13                       # Number of system calls
 
 ---------- End Simulation Statistics   ----------