Fix a typo in comments for CpuFSGSBase.

2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (CpuFSGSBase): Fix a typo in comments.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 111f1f82b778ee60c2ef4eb766928cf44348b3d1..96fffad2131160425bae24bc2d67f33147af3d88 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
+
 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 
        * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
@@ -47,7 +51,7 @@
        (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 
        * i386-opc.h (CpuXsaveopt): New.
-       (CpuFSGSBase):Likewise.
+       (CpuFSGSBase): Likewise.
        (CpuRdRnd): Likewise.
        (CpuF16C): Likewise.
        (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 0fa7e85d873c9c5e6878b236a547996571e8fd6c..9442211f225d380cc7e78fdf0832101aec38d363 100644 (file)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -114,7 +114,7 @@ enum
   CpuEPT,
   /* RDTSCP Instuction support required */
   CpuRdtscp,
-  /* FSBSBASE Instructions required */
+  /* FSGSBASE Instructions required */
   CpuFSGSBase,
   /* RDRND Instructions required */
   CpuRdRnd,