Reviewed-by: Marek Olšák <marek.olsak@amd.com>
if (nir->stage == MESA_SHADER_FRAGMENT)
handle_fs_inputs_pre(&ctx, nir);
+ ctx.abi.chip_class = options->chip_class;
ctx.abi.inputs = &ctx.inputs[0];
ctx.abi.emit_outputs = handle_shader_outputs_post;
* radv to share a compiler backend.
*/
struct ac_shader_abi {
+ enum chip_class chip_class;
+
LLVMValueRef base_vertex;
LLVMValueRef start_instance;
LLVMValueRef draw_id;
{
struct lp_build_tgsi_context *bld_base;
+ ctx->abi.chip_class = sscreen->b.chip_class;
+
si_llvm_context_init(ctx, sscreen, tm);
bld_base = &ctx->bld_base;