return nir_src_index(NULL, &alu.src);
}
+static uint8_t
+output_load_rt_addr(nir_shader *nir, nir_intrinsic_instr *instr)
+{
+ const nir_variable *var;
+ var = search_var(&nir->outputs, nir_intrinsic_base(instr));
+ assert(var);
+
+ unsigned loc = var->data.location;
+
+ if (loc == FRAG_RESULT_COLOR)
+ loc = FRAG_RESULT_DATA0;
+
+ if (loc >= FRAG_RESULT_DATA0)
+ return loc - FRAG_RESULT_DATA0;
+
+ if (loc == FRAG_RESULT_DEPTH)
+ return 0x1F;
+ if (loc == FRAG_RESULT_STENCIL)
+ return 0x1E;
+
+ assert(0);
+}
+
static void
emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
{
midgard_instruction ld = m_ld_color_buffer_32u(reg, 0);
+ ld.load_store.arg_2 = output_load_rt_addr(ctx->nir, instr);
+
if (ctx->quirks & MIDGARD_OLD_BLEND) {
ld.load_store.op = midgard_op_ld_color_buffer_32u_old;
ld.load_store.address = 16;
midgard_instruction ld = m_ld_color_buffer_as_fp16(reg, 0);
+ ld.load_store.arg_2 = output_load_rt_addr(ctx->nir, instr);
+
for (unsigned c = 4; c < 16; ++c)
ld.swizzle[0][c] = 0;
nir_intrinsic_load_raw_output_pan);
new->num_components = 4;
+ nir_intrinsic_set_base(new, base);
+
nir_ssa_dest_init(&new->instr, &new->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &new->instr);
if (var->data.mode != nir_var_shader_out)
continue;
- if (var->data.location != FRAG_RESULT_COLOR)
+ unsigned base = var->data.driver_location;
+
+ unsigned rt;
+ if (var->data.location == FRAG_RESULT_COLOR)
+ rt = 0;
+ else if (var->data.location >= FRAG_RESULT_DATA0)
+ rt = var->data.location - FRAG_RESULT_DATA0;
+ else
continue;
const struct util_format_description *desc =
- util_format_description(rt_fmts[0]);
+ util_format_description(rt_fmts[rt]);
enum pan_format_class fmt_class =
pan_format_class(desc, quirks, is_store);