Added support for "active high" and "active low" latches in BLIF front-end

diff --git a/frontends/blif/blifparse.cc b/frontends/blif/blifparse.cc
index a028c4336b549c45a5e1672de618728d49b280ea..a901e55f97a159fbbbc95e2e17e90f686e282acd 100644 (file)
--- a/frontends/blif/blifparse.cc
+++ b/frontends/blif/blifparse.cc
@@ -244,6 +244,10 @@ void parse_blif(RTLIL::Design *design, std::istream &f, std::string dff_name, bo
                                        cell = module->addDff(NEW_ID, blif_wire(clock), blif_wire(d), blif_wire(q));
                                else if (!strcmp(edge, "fe"))
                                        cell = module->addDff(NEW_ID, blif_wire(clock), blif_wire(d), blif_wire(q), false);
+                               else if (!strcmp(edge, "ah"))
+                                       cell = module->addDlatch(NEW_ID, blif_wire(clock), blif_wire(d), blif_wire(q));
+                               else if (!strcmp(edge, "al"))
+                                       cell = module->addDlatch(NEW_ID, blif_wire(clock), blif_wire(d), blif_wire(q), false);
                                else {
                        no_latch_clock:
                                        cell = module->addCell(NEW_ID, dff_name);