fixed mapping of device memory and i/o space

--HG--
extra : convert_revision : 9236c7f0aeb4d555880bdfdfa7f55cedf1cbb950

diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index 13663b32cc044fe207b9da14cea82cf6460d63e4..342561750d8816e71ec70619e84eee5c3d9cc38c 100644 (file)
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -47,6 +47,7 @@
 #include "sim/builder.hh"
 #include "sim/param.hh"
 #include "sim/universe.hh"
+#include "dev/tsunamireg.h"
 
 using namespace std;
 
@@ -176,21 +177,38 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
                 if(config.data[offset] & 0x1) {
                     *(uint32_t *)&config.data[offset] = (word_value & ~0x3) |
                         (config.data[offset] & 0x3);
-                    if (word_value) {
+
+                    if (word_value & ~0x1) {
                         // It's never been set
                         if (BARAddrs[barnum] == 0)
-                            AddMapping(word_value, BARSize[barnum]-1, MMU);
+                            AddMapping((word_value & ~0x1) + TSUNAMI_PCI0_IO,
+                                       BARSize[barnum]-1, MMU);
                         else
                             ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
-                                          word_value, BARSize[barnum]-1, MMU);
-                        BARAddrs[barnum] = word_value;
+                                          (word_value & ~0x1) + TSUNAMI_PCI0_IO,
+                                          BARSize[barnum]-1, MMU);
+                        BARAddrs[barnum] = (word_value & ~0x1) + TSUNAMI_PCI0_IO;
                     }
 
                 } else {
                     // This is memory space, bottom four bits are read only
                     *(uint32_t *)&config.data[offset] = (word_value & ~0xF) |
                         (config.data[offset] & 0xF);
-                }
+
+                    if (word_value & ~0x3) {
+                        // It's never been set
+                        if (BARAddrs[barnum] == 0)
+                            AddMapping((word_value & ~0x3) + TSUNAMI_PCI0_MEMORY,
+                                       BARSize[barnum]-1, MMU);
+                        else
+                            ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
+                                          (word_value & ~0x3) +
+                                          TSUNAMI_PCI0_MEMORY,
+                                          BARSize[barnum]-1, MMU);
+                        BARAddrs[barnum] = (word_value & ~0x3) +
+                                           TSUNAMI_PCI0_MEMORY;
+                    }
+                 }
             }
             break;
 

diff --git a/dev/tsunamireg.h b/dev/tsunamireg.h
index 7201edf9442bbc62d4d14477f3a16df5555f1160..c74279ecf8658021a5282715f04f77f17e0a49b2 100644 (file)
--- a/dev/tsunamireg.h
+++ b/dev/tsunamireg.h
@@ -2,6 +2,8 @@
 #ifndef __TSUNAMIREG_H__
 #define __TSUNAMIREG_H__
 
+#define ALPHA_K0SEG_BASE  0xfffffc0000000000
+
 // CChip Registers
 #define TSDEV_CC_CSR    0x00
 #define TSDEV_CC_MTR    0x01
@@ -99,5 +101,10 @@
 #define RTC_CONTROL_REGISTERD   13     // control register D
 #define RTC_REGNUMBER_RTC_CR1   0x6A   // control register 1
 
+#define PCHIP_PCI0_MEMORY       0x10000000000
+#define PCHIP_PCI0_IO           0x101FC000000
+#define TSUNAMI_PCI0_MEMORY     ALPHA_K0SEG_BASE + PCHIP_PCI0_MEMORY
+#define TSUNAMI_PCI0_IO         ALPHA_K0SEG_BASE + PCHIP_PCI0_IO
+
 
 #endif // __TSUNAMIREG_H__