divLoopTop:
div2 t1, rax, t1, dataSize=1
div2 t1, rax, t1, flags=(EZF,), dataSize=1
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq rax, dataSize=1
divLoopTop:
div2 t1, rax, t1, dataSize=1
div2 t1, rax, t1, flags=(EZF,), dataSize=1
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq rax, dataSize=1
divLoopTop:
div2 t1, rax, t1, dataSize=1
div2 t1, rax, t1, flags=(EZF,), dataSize=1
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq rax, dataSize=1
div2 t1, rax, t1
div2 t1, rax, t1
div2 t1, rax, t1, flags=(EZF,)
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq rax
div2 t1, rax, t1
div2 t1, rax, t1
div2 t1, rax, t1, flags=(EZF,)
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq rax
div2 t1, rax, t1
div2 t1, rax, t1
div2 t1, rax, t1, flags=(EZF,)
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq rax
divLoopTop:
div2 t4, t1, t4, dataSize=1
div2 t4, t1, t4, flags=(EZF,), dataSize=1
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq t5, dataSize=1
divLoopTop:
div2 t4, t1, t4, dataSize=1
div2 t4, t1, t4, flags=(EZF,), dataSize=1
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq t5, dataSize=1
divLoopTop:
div2 t4, t1, t4, dataSize=1
div2 t4, t1, t4, flags=(EZF,), dataSize=1
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq t5, dataSize=1
div2 t4, t1, t4
div2 t4, t1, t4
div2 t4, t1, t4, flags=(EZF,)
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq t5
div2 t4, t1, t4
div2 t4, t1, t4
div2 t4, t1, t4, flags=(EZF,)
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq t5
div2 t4, t1, t4
div2 t4, t1, t4
div2 t4, t1, t4, flags=(EZF,)
- bri t0, label("divLoopTop"), flags=(nCEZF,)
+ br label("divLoopTop"), flags=(nCEZF,)
#Unload the answer
divq t5
# Determine if the input was zero, and also move it to a temp reg.
movi t1, t1, t0, dataSize=8
and t1, regm, regm, flags=(ZF,)
- bri t0, label("end"), flags=(CZF,)
+ br label("end"), flags=(CZF,)
# Zero out the result register
movi reg, reg, 0x0
# Determine if the input was zero, and also move it to a temp reg.
and t1, t1, t1, flags=(ZF,)
- bri t0, label("end"), flags=(CZF,)
+ br label("end"), flags=(CZF,)
# Zero out the result register
movi reg, reg, 0x0
# Determine if the input was zero, and also move it to a temp reg.
and t1, t1, t1, flags=(ZF,)
- bri t0, label("end"), flags=(CZF,)
+ br label("end"), flags=(CZF,)
# Zero out the result register
movi reg, reg, 0x0
# Determine if the input was zero, and also move it to a temp reg.
mov t1, t1, t0, dataSize=8
and t1, regm, regm, flags=(ZF,)
- bri t0, label("end"), flags=(CZF,)
+ br label("end"), flags=(CZF,)
# Zero out the result register
movi reg, reg, 0
# Determine if the input was zero, and also move it to a temp reg.
and t1, t1, t1, flags=(ZF,)
- bri t0, label("end"), flags=(CZF,)
+ br label("end"), flags=(CZF,)
# Zero out the result register
mov reg, reg, t0
# Determine if the input was zero, and also move it to a temp reg.
and t1, t1, t1, flags=(ZF,)
- bri t0, label("end"), flags=(CZF,)
+ br label("end"), flags=(CZF,)
# Zero out the result register
mov reg, reg, t0
#temp_RFLAGS.VM != 1
rcri t0, t3, 18, flags=(ECF,)
- bri t0, label("protToVirtFallThrough"), flags=(nCECF,)
+ br label("protToVirtFallThrough"), flags=(nCECF,)
#CPL=0
rdm5reg t4
andi t0, t4, 0x30, flags=(EZF,)
- bri t0, label("protToVirtFallThrough"), flags=(nCEZF,)
+ br label("protToVirtFallThrough"), flags=(nCEZF,)
#(LEGACY_MODE)
rcri t0, t4, 1, flags=(ECF,)
- bri t0, label("protToVirtFallThrough"), flags=(nCECF,)
+ br label("protToVirtFallThrough"), flags=(nCECF,)
panic "iret to virtual mode not supported"
#CS = READ_DESCRIPTOR (temp_CS, iret_chk)
andi t0, t2, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processCSDescriptor"), flags=(CEZF,)
+ br label("processCSDescriptor"), flags=(CEZF,)
andi t6, t2, 0xF8, dataSize=8
andi t0, t2, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalCSDescriptor"), flags=(CEZF,)
+ br label("globalCSDescriptor"), flags=(CEZF,)
ld t6, tsl, [1, t0, t6], dataSize=8
- bri t0, label("processCSDescriptor")
+ br label("processCSDescriptor")
globalCSDescriptor:
ld t6, tsg, [1, t0, t6], dataSize=8
processCSDescriptor:
andi t0, t4, 0xE, flags=(EZF,)
# Since we just found out we're in 64 bit mode, take advantage and
# do the appropriate RIP checks.
- bri t0, label("doPopStackStuffAndCheckRIP"), flags=(CEZF,)
+ br label("doPopStackStuffAndCheckRIP"), flags=(CEZF,)
# Here, we know we're -not- in 64 bit mode, so we should do the
# appropriate/other RIP checks.
srli t7, t4, 4
xor t7, t7, t5
andi t0, t7, 0x3, flags=(EZF,)
- bri t0, label("doPopStackStuff"), flags=(nCEZF,)
+ br label("doPopStackStuff"), flags=(nCEZF,)
# We can modify user visible state here because we're know
# we're done with things that can fault.
addi rsp, rsp, "3 * env.stackSize"
- bri t0, label("fallThroughPopStackStuff")
+ br label("fallThroughPopStackStuff")
doPopStackStuffAndCheckRIP:
# Check if the RIP is canonical.
sra t7, t1, 47, flags=(EZF,), dataSize=ssz
# if t7 isn't 0 or -1, it wasn't canonical.
- bri t0, label("doPopStackStuff"), flags=(CEZF,)
+ br label("doPopStackStuff"), flags=(CEZF,)
addi t0, t7, 1, flags=(EZF,), dataSize=ssz
fault "new GeneralProtection(0)", flags=(nCEZF,)
ld t2, ss, [1, t0, rsp], "4 * env.dataSize", dataSize=ssz
# SS = READ_DESCRIPTOR (temp_SS, ss_chk)
andi t0, t2, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processSSDescriptor"), flags=(CEZF,)
+ br label("processSSDescriptor"), flags=(CEZF,)
andi t7, t2, 0xF8, dataSize=8
andi t0, t2, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalSSDescriptor"), flags=(CEZF,)
+ br label("globalSSDescriptor"), flags=(CEZF,)
ld t7, tsl, [1, t0, t7], dataSize=8
- bri t0, label("processSSDescriptor")
+ br label("processSSDescriptor")
globalSSDescriptor:
ld t7, tsg, [1, t0, t7], dataSize=8
processSSDescriptor:
srli t7, t4, 4
xor t7, t7, t5
andi t0, t7, 0x3, flags=(EZF,)
- bri t0, label("skipSegmentSquashing"), flags=(CEZF,)
+ br label("skipSegmentSquashing"), flags=(CEZF,)
# The attribute register needs to keep track of more info before this will
# work the way it needs to.
# Do stuff if they're equal
andi t0, t2, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t3, t2, 0xF8, dataSize=8
andi t0, t2, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t3], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t3], dataSize=8
processDescriptor:
wrdl cs, t3, t2
wrsel cs, t2
wrip t0, t1
- bri t0, label("end")
+ br label("end")
# Do other stuff if they're not.
end:
def macroop MOV_S_R {
andi t0, regm, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t2, regm, 0xF8, dataSize=8
andi t0, regm, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t2], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t2], dataSize=8
processDescriptor:
def macroop MOV_S_M {
ld t1, seg, sib, disp, dataSize=2
andi t0, t1, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t2, t1, 0xF8, dataSize=8
andi t0, t1, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t2], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t2], dataSize=8
processDescriptor:
rdip t7
ld t1, seg, riprel, disp, dataSize=2
andi t0, t1, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t2, t1, 0xF8, dataSize=8
andi t0, t1, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t2], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t2], dataSize=8
processDescriptor:
def macroop MOVSS_S_R {
andi t0, regm, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t2, regm, 0xF8, dataSize=8
andi t0, regm, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t2], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t2], dataSize=8
processDescriptor:
def macroop MOVSS_S_M {
ld t1, seg, sib, disp, dataSize=2
andi t0, t1, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t2, t1, 0xF8, dataSize=8
andi t0, t1, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t2], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t2], dataSize=8
processDescriptor:
rdip t7
ld t1, seg, riprel, disp, dataSize=2
andi t0, t1, 0xFC, flags=(EZF,), dataSize=2
- bri t0, label("processDescriptor"), flags=(CEZF,)
+ br label("processDescriptor"), flags=(CEZF,)
andi t2, t1, 0xF8, dataSize=8
andi t0, t1, 0x4, flags=(EZF,), dataSize=2
- bri t0, label("globalDescriptor"), flags=(CEZF,)
+ br label("globalDescriptor"), flags=(CEZF,)
ld t3, tsl, [1, t0, t2], dataSize=8
- bri t0, label("processDescriptor")
+ br label("processDescriptor")
globalDescriptor:
ld t3, tsg, [1, t0, t2], dataSize=8
processDescriptor:
# If the nesting level is zero, skip all this stuff.
subi t0, t1, t0, flags=(EZF,), dataSize=2
- bri t0, label("skipLoop"), flags=(CEZF,)
+ br label("skipLoop"), flags=(CEZF,)
# If the level was 1, only push the saved rbp
subi t0, t1, 1, flags=(EZF,)
- bri t0, label("bottomOfLoop"), flags=(CEZF,)
+ br label("bottomOfLoop"), flags=(CEZF,)
limm t4, "ULL(-1)", dataSize=8
topOfLoop:
# If we're not done yet, loop
subi t4, t4, 1, dataSize=8
add t0, t4, t1, flags=(EZF,)
- bri t0, label("topOfLoop"), flags=(nCEZF,)
+ br label("topOfLoop"), flags=(nCEZF,)
bottomOfLoop:
# Push the old rbp onto the stack
def macroop INS_E_M_R {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
movi t3, t3, dsz, flags=(CEZF,), dataSize=asz
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(nCEZF,)
+ br label("topOfLoop"), flags=(nCEZF,)
end:
fault "NoFault"
};
def macroop OUTS_E_R_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
movi t3, t3, dsz, flags=(CEZF,), dataSize=asz
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rsi, rsi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(nCEZF,)
+ br label("topOfLoop"), flags=(nCEZF,)
end:
fault "NoFault"
};
def macroop CMPS_E_M_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t3, dataSize=asz
add rsi, rsi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(CSTRZnEZF,)
+ br label("topOfLoop"), flags=(CSTRZnEZF,)
end:
fault "NoFault"
};
def macroop CMPS_N_M_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t3, dataSize=asz
add rsi, rsi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(CSTRnZnEZF,)
+ br label("topOfLoop"), flags=(CSTRnZnEZF,)
end:
fault "NoFault"
};
def macroop LODS_E_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
movi t3, t3, dsz, flags=(CEZF,), dataSize=asz
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(nCEZF,)
+ br label("topOfLoop"), flags=(nCEZF,)
end:
fault "NoFault"
};
def macroop MOVS_E_M_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
movi t3, t3, dsz, flags=(CEZF,), dataSize=asz
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t3, dataSize=asz
add rsi, rsi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(nCEZF,)
+ br label("topOfLoop"), flags=(nCEZF,)
end:
fault "NoFault"
};
def macroop SCAS_E_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t2, dataSize=asz
- bri t0, label("topOfLoop"), flags=(CSTRZnEZF,)
+ br label("topOfLoop"), flags=(CSTRZnEZF,)
end:
fault "NoFault"
};
def macroop SCAS_N_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t2, dataSize=asz
- bri t0, label("topOfLoop"), flags=(CSTRnZnEZF,)
+ br label("topOfLoop"), flags=(CSTRnZnEZF,)
end:
fault "NoFault"
};
def macroop STOS_E_M {
and t0, rcx, rcx, flags=(EZF,), dataSize=asz
- bri t0, label("end"), flags=(CEZF,)
+ br label("end"), flags=(CEZF,)
# Find the constant we need to either add or subtract from rdi
ruflag t0, 10
movi t3, t3, dsz, flags=(CEZF,), dataSize=asz
subi rcx, rcx, 1, flags=(EZF,), dataSize=asz
add rdi, rdi, t3, dataSize=asz
- bri t0, label("topOfLoop"), flags=(nCEZF,)
+ br label("topOfLoop"), flags=(nCEZF,)
end:
fault "NoFault"
};
//Load/store microop definitions
##include "ldstop.isa"
+//Control flow microop definitions
+##include "seqop.isa"
+
//Miscellaneous microop definitions
##include "specop.isa"
code = 'RIP = psrc1 + sop2 + CSBase'
else_code="RIP = RIP;"
- class Br(WrRegOp, CondRegOp):
- code = 'nuIP = psrc1 + op2;'
- else_code='nuIP = nuIP;'
-
class Wruflags(WrRegOp):
code = 'ccFlagBits = psrc1 ^ op2'
--- /dev/null
+// Copyright (c) 2008 The Hewlett-Packard Development Company
+// All rights reserved.
+//
+// Redistribution and use of this software in source and binary forms,
+// with or without modification, are permitted provided that the
+// following conditions are met:
+//
+// The software must be used only for Non-Commercial Use which means any
+// use which is NOT directed to receiving any direct monetary
+// compensation for, or commercial advantage from such use. Illustrative
+// examples of non-commercial use are academic research, personal study,
+// teaching, education and corporate research & development.
+// Illustrative examples of commercial use are distributing products for
+// commercial advantage and providing services using the software for
+// commercial advantage.
+//
+// If you wish to use this software or functionality therein that may be
+// covered by patents for commercial use, please contact:
+// Director of Intellectual Property Licensing
+// Office of Strategy and Technology
+// Hewlett-Packard Company
+// 1501 Page Mill Road
+// Palo Alto, California 94304
+//
+// Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer. Redistributions
+// in binary form must reproduce the above copyright notice, this list of
+// conditions and the following disclaimer in the documentation and/or
+// other materials provided with the distribution. Neither the name of
+// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission. No right of
+// sublicense is granted herewith. Derivatives of the software and
+// output created using the software may be prepared, but only for
+// Non-Commercial Uses. Derivatives of the software may be shared with
+// others provided: (i) the others agree to abide by the list of
+// conditions herein which includes the Non-Commercial Use restrictions;
+// and (ii) such Derivatives of the software include the above copyright
+// notice to acknowledge the contribution from this software where
+// applicable, this list of conditions and the disclaimer below.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Gabe Black
+
+output header {{
+ class SeqOpBase : public X86ISA::X86MicroopBase
+ {
+ protected:
+ uint16_t target;
+ uint8_t cc;
+
+ public:
+ SeqOpBase(ExtMachInst _machInst, const char * instMnem,
+ const char * mnemonic,
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ uint16_t _target, uint8_t _cc);
+
+ SeqOpBase(ExtMachInst _machInst, const char * instMnem,
+ const char * mnemonic,
+ uint16_t _target, uint8_t _cc);
+
+ std::string generateDisassembly(Addr pc,
+ const SymbolTable *symtab) const;
+ };
+}};
+
+def template SeqOpDeclare {{
+ class %(class_name)s : public %(base_class)s
+ {
+ private:
+ void buildMe();
+ public:
+ %(class_name)s(ExtMachInst _machInst, const char * instMnem,
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ uint16_t _target, uint8_t _cc);
+
+ %(class_name)s(ExtMachInst _machInst, const char * instMnem,
+ uint16_t _target, uint8_t _cc);
+
+ %(BasicExecDeclare)s
+ };
+}};
+
+def template SeqOpExecute {{
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
+ {
+ %(op_decl)s;
+ %(op_rd)s;
+ if (%(cond_test)s) {
+ %(code)s;
+ } else {
+ %(else_code)s;
+ }
+ %(op_wb)s;
+ return NoFault;
+ }
+}};
+
+output decoder {{
+ inline SeqOpBase::SeqOpBase(
+ ExtMachInst machInst, const char * mnemonic, const char * instMnem,
+ uint16_t _target, uint8_t _cc) :
+ X86MicroopBase(machInst, mnemonic, instMnem,
+ false, false, false, false, No_OpClass),
+ target(_target), cc(_cc)
+ {
+ }
+
+ inline SeqOpBase::SeqOpBase(
+ ExtMachInst machInst, const char * mnemonic, const char * instMnem,
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ uint16_t _target, uint8_t _cc) :
+ X86MicroopBase(machInst, mnemonic, instMnem,
+ isMicro, isDelayed, isFirst, isLast, No_OpClass),
+ target(_target), cc(_cc)
+ {
+ }
+}};
+
+def template SeqOpConstructor {{
+
+ inline void %(class_name)s::buildMe()
+ {
+ %(constructor)s;
+ }
+
+ inline %(class_name)s::%(class_name)s(
+ ExtMachInst machInst, const char * instMnem,
+ uint16_t _target, uint8_t _cc) :
+ %(base_class)s(machInst, "%(mnemonic)s", instMnem, _target, _cc)
+ {
+ buildMe();
+ }
+
+ inline %(class_name)s::%(class_name)s(
+ ExtMachInst machInst, const char * instMnem,
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ uint16_t _target, uint8_t _cc) :
+ %(base_class)s(machInst, "%(mnemonic)s", instMnem,
+ isMicro, isDelayed, isFirst, isLast, _target, _cc)
+ {
+ buildMe();
+ }
+}};
+
+output decoder {{
+ std::string SeqOpBase::generateDisassembly(Addr pc,
+ const SymbolTable *symtab) const
+ {
+ std::stringstream response;
+
+ printMnemonic(response, instMnem, mnemonic);
+ ccprintf(response, "%#x", target);
+
+ return response.str();
+ }
+}};
+
+let {{
+ class Br(X86Microop):
+ className = "MicroBranch"
+ def __init__(self, target, flags=None):
+ self.target = target
+ if flags:
+ if not isinstance(flags, (list, tuple)):
+ raise Exception, "flags must be a list or tuple of flags"
+ self.cond = " | ".join(flags)
+ self.className += "Flags"
+ else:
+ self.cond = "0"
+
+ def getAllocator(self, *microFlags):
+ allocator = '''new %(class_name)s(machInst, mnemonic
+ %(flags)s, %(target)s, %(cc)s)''' % {
+ "class_name" : self.className,
+ "flags" : self.microFlagsText(microFlags),
+ "target" : self.target,
+ "cc" : self.cond}
+ return allocator
+
+ iop = InstObjParams("br", "MicroBranchFlags", "SeqOpBase",
+ {"code": "nuIP = target",
+ "else_code": "nuIP = nuIP",
+ "cond_test": "checkCondition(ccFlagBits, cc)"})
+ exec_output += SeqOpExecute.subst(iop)
+ header_output += SeqOpDeclare.subst(iop)
+ decoder_output += SeqOpConstructor.subst(iop)
+ iop = InstObjParams("br", "MicroBranch", "SeqOpBase",
+ {"code": "nuIP = target",
+ "else_code": "nuIP = nuIP",
+ "cond_test": "true"})
+ exec_output += SeqOpExecute.subst(iop)
+ header_output += SeqOpDeclare.subst(iop)
+ decoder_output += SeqOpConstructor.subst(iop)
+ microopClasses["br"] = Br
+}};
projects / gem5.git / commitdiff