+2015-07-14 Sandra Loosemore <sandra@codesourcery.com>
+ Cesar Philippidis <cesar@codesourcery.com>
+ Chung-Lin Tang <cltang@codesourcery.com>
+
+ * config/nios2/nios2.opt (march, mbmx, mcdx): New options.
+ * config/nios2/nios2-opts.h (enum nios2_arch_type): New enum for
+ Nios II architecture level.
+ * config/nios2/nios2.h (TARGET_ARCH_R2): New define.
+ (TARGET_CPU_CPP_BUILTINS): Add definition of __nios2_arch__ symbol.
+ (OPTION_DEFAULT_SPECS): Define.
+ (ASM_SPEC): Add -march= spec strings.
+ * config/nios2/nios2.c (nios2_option_override): Check for
+ conflicts involving new options.
+ * config.gcc (nios2*-*-*): Support --with-arch=.
+ * doc/invoke.texi (Option Summary, Nios II Options): Document
+ -march=, -mbmx, and -mcdx.
+
2015-07-14 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/66626
esac
;;
+ nios2*-*-*)
+ supported_defaults="arch"
+ case "$with_arch" in
+ "" | r1 | r2)
+ # OK
+ ;;
+ *)
+ echo "Unknown arch used in --with-arch=$with_arch" 1>&2
+ exit 1
+ ;;
+ esac
+ ;;
+
powerpc*-*-* | rs6000-*-*)
supported_defaults="abi cpu cpu_32 cpu_64 float tune tune_32 tune_64 advance_toolchain"
CCS_BUILTIN_CALL
};
+/* Supported Nios II Architectures. */
+enum nios2_arch_type
+{
+ ARCH_R1=1,
+ ARCH_R2
+};
+
#endif
if (!TARGET_HAS_MUL && TARGET_HAS_MULX)
target_flags &= ~MASK_HAS_MULX;
+ /* Optional BMX and CDX instructions only make sense for R2. */
+ if (!TARGET_ARCH_R2)
+ {
+ if (TARGET_HAS_BMX)
+ error ("BMX instructions are only supported with R2 architecture");
+ if (TARGET_HAS_CDX)
+ error ("CDX instructions are only supported with R2 architecture");
+ }
+
+ /* R2 is little-endian only. */
+ if (TARGET_ARCH_R2 && TARGET_BIG_ENDIAN)
+ error ("R2 architecture is little-endian only");
+
/* Initialize default FPU configurations. */
nios2_init_fpu_configs ();
#ifndef GCC_NIOS2_H
#define GCC_NIOS2_H
+/* Indicate R2 ISA level support. */
+#define TARGET_ARCH_R2 (nios2_arch_option == ARCH_R2)
+
/* FPU insn codes declared here. */
#include "config/nios2/nios2-opts.h"
builtin_define_std ("nios2_big_endian"); \
else \
builtin_define_std ("nios2_little_endian"); \
- } \
+ builtin_define_with_int_value ( \
+ "__nios2_arch__", (int) nios2_arch_option); \
+ } \
while (0)
/* We're little endian, unless otherwise specified by defining
# define TARGET_DEFAULT (MASK_HAS_MUL | TARGET_ENDIAN_DEFAULT)
#endif
+#define OPTION_DEFAULT_SPECS \
+ {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }
+
#define CC1_SPEC "%{G*}"
#if TARGET_ENDIAN_DEFAULT == 0
-# define ASM_SPEC "%{!meb:-EL} %{meb:-EB}"
+# define ASM_SPEC "%{!meb:-EL} %{meb:-EB} %{march=*:-march=%*}"
# define LINK_SPEC_ENDIAN "%{!meb:-EL} %{meb:-EB}"
# define MULTILIB_DEFAULTS { "EL" }
#else
-# define ASM_SPEC "%{!mel:-EB} %{mel:-EL}"
+# define ASM_SPEC "%{!mel:-EB} %{mel:-EL} %{march=*:-march=%*}"
# define LINK_SPEC_ENDIAN "%{!mel:-EB} %{mel:-EL}"
# define MULTILIB_DEFAULTS { "EB" }
#endif
Target Report RejectNegative Joined UInteger Var(nios2_custom_round) Init(-1)
Integer id (N) of round custom instruction
+march=
+Target RejectNegative Joined Enum(nios2_arch_type) Var(nios2_arch_option) Init(ARCH_R1)
+Specify the name of the target architecture.
+Enum
+Name(nios2_arch_type) Type(enum nios2_arch_type)
+Valid Nios II ISA levels (for -march):
+
+EnumValue
+Enum(nios2_arch_type) String(r1) Value(ARCH_R1)
+
+EnumValue
+Enum(nios2_arch_type) String(r2) Value(ARCH_R2)
+
+mbmx
+Target Report Mask(HAS_BMX)
+Enable generation of R2 BMX instructions
+
+mcdx
+Target Report Mask(HAS_CDX)
+Enable generation of R2 CDX instructions
-mhw-mul -mno-hw-mul -mhw-mulx -mno-hw-mulx -mno-hw-div -mhw-div @gol
-mcustom-@var{insn}=@var{N} -mno-custom-@var{insn} @gol
-mcustom-fpu-cfg=@var{name} @gol
--mhal -msmallc -msys-crt0=@var{name} -msys-lib=@var{name}}
+-mhal -msmallc -msys-crt0=@var{name} -msys-lib=@var{name} @gol
+-march=@var{arch} -mbmx -mno-bmx -mcdx -mno-cdx}
@emph{Nvidia PTX Options}
@gccoptlist{-m32 -m64 -mmainkernel}
Generate little-endian (default) or big-endian (experimental) code,
respectively.
+@item -march=@var{arch}
+@opindex march
+This specifies the name of the target Nios II architecture. GCC uses this
+name to determine what kind of instructions it can emit when generating
+assembly code. Permissible names are: @samp{r1}, @samp{r2}.
+
+The preprocessor macro @code{__nios2_arch__} is available to programs,
+with value 1 or 2, indicating the targeted ISA level.
+
@item -mbypass-cache
@itemx -mno-bypass-cache
@opindex mno-bypass-cache
instructions by the compiler. The default is to emit @code{mul}
and not emit @code{div} and @code{mulx}.
+@item -mbmx
+@itemx -mno-bmx
+@itemx -mcdx
+@itemx -mno-cdx
+Enable or disable generation of Nios II R2 BMX (bit manipulation) and
+CDX (code density) instructions. Enabling these instructions also
+requires @option{-march=r2}. Since these instructions are optional
+extensions to the R2 architecture, the default is not to emit them.
+
@item -mcustom-@var{insn}=@var{N}
@itemx -mno-custom-@var{insn}
@opindex mcustom-@var{insn}
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