vmrhg,vmrhh,axtr,fiebra,vleb,cxtr,vlef,vleg,vleh,vpkf,vpkg,vpkh,vmlob,vmlof,\
vmloh,lxdb,ldeb,mdtr,vceqfs,adb,wflndb,lxeb,vn,vo,vchlb,vx,mxtr,vchlf,vchlg,\
vchlh,vfcedbs,vfcedb,vceqgs,cxbr,msdbr,vcdgb,debr,vceqhs,meeb,lcxbr,vavglb,\
-vavglf,vavglg,vavglh,wfcedbs,vmrlb,vmrlf,vmrlg,vmrlh,wfchedbs,vmxb,tcdb,\
+vavglf,vavglg,vavglh,vmrlb,vmrlf,vmrlg,vmrlh,vmxb,tcdb,\
vmahh,vsrlb,wcgdb,lcdbr,vistrbs,vrepb,wfmdb,vrepf,vrepg,vreph,ler,wcdlgb,\
ley,vistrb,vistrf,vistrh,tceb,wfsqdb,sqeb,vsumqf,vsumqg,vesrlb,vfeezbs,\
maebr,vesrlf,vesrlg,vesrlh,vmeb,vmef,vmeh,meebr,vflcdb,wfmadb,vperm,sxtr,\
vfenezf,vfenezh,vistrfs,vchf,vchg,vchh,vmhb,vmhf,vmhh,cdb,veslvb,ledbr,\
veslvf,veslvg,veslvh,wclgdb,vfmdb,vmnlb,vmnlf,vmnlg,vmnlh,vclzb,vfeezfs,\
vclzg,vclzh,mdb,vmxlb,vmxlf,vmxlg,vmxlh,ltdtr,vsbcbiq,ceb,wfddb,sebr,vistrhs,\
-lxdtr,lcebr,vab,vaf,vag,vah,ltxtr,vlpf,vlpg,vsegb,vaq,vsegf,vsegh,wfchdbs,\
+lxdtr,lcebr,vab,vaf,vag,vah,ltxtr,vlpf,vlpg,vsegb,vaq,vsegf,vsegh,\
sdtr,cdbr,vfeezhs,le,wldeb,vfmadb,vchlbs,vacccq,vmaleb,vsel,vmalef,vmaleh,\
vflndb,mdbr,vmlb,wflpdb,ldetr,vpksfs,vpksf,vpksg,vpksh,sqdb,mxbr,sqdbr,\
vmaeb,veslh,vmaef,vpklsf,vpklsg,vpklsh,verllb,vchb,ddtr,verllf,verllg,verllh,\
vmrhh,axtr,fiebra,vleb,cxtr,vlef,vleg,vleh,vpkf,vpkg,vpkh,vmlob,vmlof,vmloh,\
lxdb,ldeb,vceqfs,adb,wflndb,lxeb,vn,vo,vchlb,vx,vchlf,vchlg,vchlh,vfcedbs,\
vfcedb,vceqgs,cxbr,msdbr,vcdgb,vceqhs,meeb,lcxbr,vavglb,vavglf,vavglg,vavglh,\
-wfcedbs,vmrlb,vmrlf,vmrlg,vmrlh,wfchedbs,vmxb,tcdb,vmahh,vsrlb,wcgdb,lcdbr,\
+vmrlb,vmrlf,vmrlg,vmrlh,vmxb,tcdb,vmahh,vsrlb,wcgdb,lcdbr,\
vistrbs,vrepb,wfmdb,vrepf,vrepg,vreph,ler,wcdlgb,ley,vistrb,vistrf,vistrh,\
tceb,vsumqf,vsumqg,vesrlb,vfeezbs,maebr,vesrlf,vesrlg,vesrlh,vmeb,vmef,\
vmeh,meebr,vflcdb,wfmadb,vperm,sxtr,vclzf,vgm,vgmb,vgmf,vgmg,vgmh,tdcxt,\
vchh,vmhb,vmhf,vmhh,cdb,veslvb,ledbr,veslvf,veslvg,veslvh,wclgdb,vfmdb,\
vmnlb,vmnlf,vmnlg,vmnlh,vclzb,vfeezfs,vclzg,vclzh,mdb,vmxlb,vmxlf,vmxlg,\
vmxlh,ltdtr,vsbcbiq,ceb,sebr,vistrhs,lxdtr,lcebr,vab,vaf,vag,vah,ltxtr,\
-vlpf,vlpg,vsegb,vaq,vsegf,vsegh,wfchdbs,sdtr,cdbr,vfeezhs,le,wldeb,vfmadb,\
+vlpf,vlpg,vsegb,vaq,vsegf,vsegh,sdtr,cdbr,vfeezhs,le,wldeb,vfmadb,\
vchlbs,vacccq,vmaleb,vsel,vmalef,vmaleh,vflndb,mdbr,vmlb,wflpdb,ldetr,vpksfs,\
vpksf,vpksg,vpksh,vmaeb,veslh,vmaef,vpklsf,vpklsg,vpklsh,verllb,vchb,verllf,\
verllg,verllh,wfsdb,maeb,vclgdb,vftcidb,vpksgs,vmxf,vmxg,vmxh,fidbra,vmnb,\
machine_mode
s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
{
- if (TARGET_VX
- && register_operand (op0, DFmode)
- && register_operand (op1, DFmode))
- {
- /* LT, LE, UNGT, UNGE require swapping OP0 and OP1. Either
- s390_emit_compare or s390_canonicalize_comparison will take
- care of it. */
- switch (code)
- {
- case EQ:
- case NE:
- return CCVEQmode;
- case GT:
- case UNLE:
- return CCVFHmode;
- case GE:
- case UNLT:
- return CCVFHEmode;
- default:
- ;
- }
- }
-
switch (code)
{
case EQ:
*code = (int)swap_condition ((enum rtx_code)*code);
}
- /* Using the scalar variants of vector instructions for 64 bit FP
- comparisons might require swapping the operands. */
- if (TARGET_VX
- && register_operand (*op0, DFmode)
- && register_operand (*op1, DFmode)
- && (*code == LT || *code == LE || *code == UNGT || *code == UNGE))
- {
- rtx tmp;
-
- switch (*code)
- {
- case LT: *code = GT; break;
- case LE: *code = GE; break;
- case UNGT: *code = UNLE; break;
- case UNGE: *code = UNLT; break;
- default: ;
- }
- tmp = *op0; *op0 = *op1; *op1 = tmp;
- }
-
/* A comparison result is compared against zero. Replace it with
the (perhaps inverted) original comparison.
This probably should be done by simplify_relational_operation. */
}
}
-/* Helper function for s390_emit_compare. If possible emit a 64 bit
- FP compare using the single element variant of vector instructions.
- Replace CODE with the comparison code to be used in the CC reg
- compare and return the condition code register RTX in CC. */
-
-static bool
-s390_expand_vec_compare_scalar (enum rtx_code *code, rtx cmp1, rtx cmp2,
- rtx *cc)
-{
- machine_mode cmp_mode;
- bool swap_p = false;
-
- switch (*code)
- {
- case EQ: cmp_mode = CCVEQmode; break;
- case NE: cmp_mode = CCVEQmode; break;
- case GT: cmp_mode = CCVFHmode; break;
- case GE: cmp_mode = CCVFHEmode; break;
- case UNLE: cmp_mode = CCVFHmode; break;
- case UNLT: cmp_mode = CCVFHEmode; break;
- case LT: cmp_mode = CCVFHmode; *code = GT; swap_p = true; break;
- case LE: cmp_mode = CCVFHEmode; *code = GE; swap_p = true; break;
- case UNGE: cmp_mode = CCVFHmode; *code = UNLE; swap_p = true; break;
- case UNGT: cmp_mode = CCVFHEmode; *code = UNLT; swap_p = true; break;
- default: return false;
- }
-
- if (swap_p)
- {
- rtx tmp = cmp2;
- cmp2 = cmp1;
- cmp1 = tmp;
- }
-
- emit_insn (gen_rtx_PARALLEL (VOIDmode,
- gen_rtvec (2,
- gen_rtx_SET (gen_rtx_REG (cmp_mode, CC_REGNUM),
- gen_rtx_COMPARE (cmp_mode, cmp1,
- cmp2)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (V2DImode)))));
-
- /* This is the cc reg how it will be used in the cc mode consumer.
- It either needs to be CCVFALL or CCVFANY. However, CC1 will
- never be set by the scalar variants. So it actually doesn't
- matter which one we choose here. */
- *cc = gen_rtx_REG (CCVFALLmode, CC_REGNUM);
- return true;
-}
-
/* Emit a compare instruction suitable to implement the comparison
OP0 CODE OP1. Return the correct condition RTL to be placed in
machine_mode mode = s390_select_ccmode (code, op0, op1);
rtx cc;
- if (TARGET_VX
- && register_operand (op0, DFmode)
- && register_operand (op1, DFmode)
- && s390_expand_vec_compare_scalar (&code, op0, op1, &cc))
- {
- /* Work has been done by s390_expand_vec_compare_scalar already. */
- }
- else if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
+ if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
{
/* Do not output a redundant compare instruction if a
compare_and_swap pattern already computed the result and the
int
eq (double a, double b)
{
+ asm ("" : : :
+ "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15");
return a == b;
}
-/* { dg-final { scan-assembler "eq:\n\twfcedbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */
+/* { dg-final { scan-assembler "eq:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochine\t%r2,0" } } */
int
ne (double a, double b)
{
+ asm ("" : : :
+ "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15");
return a != b;
}
-/* { dg-final { scan-assembler "ne:\n\twfcedbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochie\t%r2,0" } } */
+/* { dg-final { scan-assembler "ne:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochie\t%r2,0" } } */
int
gt (double a, double b)
{
+ asm ("" : : :
+ "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15");
return a > b;
}
-/* { dg-final { scan-assembler "gt:\n\twfchdbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */
+/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinh\t%r2,0" } } */
int
ge (double a, double b)
{
+ asm ("" : : :
+ "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15");
return a >= b;
}
-/* { dg-final { scan-assembler "ge:\n\twfchedbs\t%v\[0-9\]*,%v0,%v2\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */
+/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinhe\t%r2,0" } } */
int
lt (double a, double b)
{
+ asm ("" : : :
+ "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15");
return a < b;
}
-/* { dg-final { scan-assembler "lt:\n\twfchdbs\t%v\[0-9\]*,%v2,%v0\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */
+/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinl\t%r2,0" } } */
int
le (double a, double b)
{
+ asm ("" : : :
+ "f0", "f1", "f2", "f3", "f4" , "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15");
return a <= b;
}
-/* { dg-final { scan-assembler "le:\n\twfchedbs\t%v\[0-9\]*,%v2,%v0\n\tlhi\t%r2,1\n\tlochine\t%r2,0" } } */
-
+/* { dg-final { scan-assembler "le:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinle\t%r2,0" } } */
projects / gcc.git / commitdiff