invoke.texi (core-avx2): Document.

        * doc/invoke.texi (core-avx2): Document.
        (slm): Likewise.
        (atom): Updated with MOVBE.

From-SVN: r199943

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3c881b0cf9746a647859a141a3c343f73bc3b850..52f7e7cf5375062239569b24f6e48143db59d7dc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-06-11  Igor Zamyatin  <igor.zamyatin@intel.com>
+
+       * doc/invoke.texi (core-avx2): Document.
+       (slm): Likewise.
+       (atom): Updated with MOVBE.
+
 2013-06-11  Richard Biener  <rguenther@suse.de>
 
        * collect2.c (main): Do not redirect ld stdout/stderr when

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b7b32f73b75b501084cf20de948326199a0d2525..dd828800955cbc24eaff12e8d9c99b6ee4fe3fa3 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -13833,10 +13833,19 @@ Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3,
 SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction
 set support.
 
+@item core-avx2
+Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2
+and F16C instruction set support.
+
 @item atom
-Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+Intel Atom CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3
 instruction set support.
 
+@item slm
+Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1 and SSE4.2 instruction set support.
+
 @item k6
 AMD K6 CPU with MMX instruction set support.