Changed CH02-44.png to asic_iopad_gen.svg image

diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
index 17429715ef6c393d2e68b24871ac53b808329ba9..0ad09eb5ef47fc82eb9b0ec9f260716df5b02aad 100644 (file)
--- a/docs/pinmux.mdwn
+++ b/docs/pinmux.mdwn
@@ -18,7 +18,7 @@ out-enable) to be routed right the way from the ASIC, all
 the way to the IO PAD, where only then does a wire bond connect
 it to a single external pin.
 
-[[!img CH02-44.gif]]
+[[!img asic_iopad_gen.svg]]
 
 Designing an ASIC, there is no guarantee that the IO pad is
 working when manufactured. Worse, the peripheral could be