kernel: TimingInfo to clamp -ve setup/edge-sensitive delays to zero

diff --git a/kernel/timinginfo.h b/kernel/timinginfo.h
index fb4e0930d7128f3a9f0e5678eb5bdb11998cd111..36908868c1ba64ed30b4a736af3c99a1ec9517cc 100644 (file)
--- a/kernel/timinginfo.h
+++ b/kernel/timinginfo.h
@@ -128,11 +128,9 @@ struct TimingInfo
                                int rise_max = cell->getParam(ID::T_RISE_MAX).as_int();
                                int fall_max = cell->getParam(ID::T_FALL_MAX).as_int();
                                int max = std::max(rise_max,fall_max);
-                               if (max < 0)
-                                       log_warning("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell));
-                               if (max <= 0) {
-                                       log_debug("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX <= 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell));
-                                       continue;
+                               if (max < 0) {
+                                       log_warning("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0 which is currently unsupported. Clamping to 0.\n", log_id(module), log_id(cell));
+                                       max = 0;
                                }
                                for (const auto &d : dst) {
                                        auto &v = t.arrival[NameBit(d)];
@@ -152,11 +150,9 @@ struct TimingInfo
                                        if (!c.wire->port_input)
                                                log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(dst));
                                int max = cell->getParam(ID::T_LIMIT_MAX).as_int();
-                               if (max < 0)
-                                       log_warning("Module '%s' contains specify cell '%s' with T_LIMIT_MAX < 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell));
-                               if (max <= 0) {
-                                       log_debug("Module '%s' contains specify cell '%s' with T_LIMIT_MAX <= 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell));
-                                       continue;
+                               if (max < 0) {
+                                       log_warning("Module '%s' contains specify cell '%s' with T_LIMIT_MAX < 0 which is currently unsupported. Clamping to 0.\n", log_id(module), log_id(cell));
+                                       max = 0;
                                }
                                for (const auto &s : src) {
                                        auto &v = t.required[NameBit(s)];