re PR bootstrap/69885 (ICE in maybe_legitimize_operand, at optabs.c:6903 on m68k...

	PR target/69885
	* doc/md.texi (ashl@var{m}3): Document that mode of operand 2 must
	be specified.

From-SVN: r233613

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a8a5613ac1f3e9c17f8e779e4d3d23dfe1800ae1..fea679871027a3e404e1b9453cade8919bb51f11 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 2016-02-22  Jakub Jelinek  <jakub@redhat.com>
 
+       PR target/69885
+       * doc/md.texi (ashl@var{m}3): Document that mode of operand 2 must
+       be specified.
+
        PR target/69894
        PR target/69895
        * config/m68k/t-opts (OPTIONS_H_EXTRA): Add m68k-microarchs.def

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index f9ecfceedb02c794cad56ba876e12feb42ee34c8..4c83719588a9ec1895c18bfd93abc861098e81bb 100644 (file)
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -5283,7 +5283,9 @@ Arithmetic-shift operand 1 left by a number of bits specified by operand
 2, and store the result in operand 0.  Here @var{m} is the mode of
 operand 0 and operand 1; operand 2's mode is specified by the
 instruction pattern, and the compiler will convert the operand to that
-mode before generating the instruction.  The meaning of out-of-range shift
+mode before generating the instruction.  The shift or rotate expander
+or instruction pattern should explicitly specify the mode of the operand 2,
+it should never be @code{VOIDmode}.  The meaning of out-of-range shift
 counts can optionally be specified by @code{TARGET_SHIFT_TRUNCATION_MASK}.
 @xref{TARGET_SHIFT_TRUNCATION_MASK}.  Operand 2 is always a scalar type.