ppc-auxv.h (PPC_FEATURE2_DARN): New define.

gcc/
	* config/rs6000/ppc-auxv.h (PPC_FEATURE2_DARN): New define.
	(PPC_FEATURE2_SCV): Likewise.
	* config/rs6000/rs6000.c (cpu_supports_info): Use them.

gcc/testsuite/
	* gcc.target/powerpc/cpu-builtin-1.c (darn, scv): Add tests.

From-SVN: r250687

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 327e470d2856e452d84a5e6da88247e5820edbd6..bdf4d3d6f7bb886dfdb0c196ef29c452faf6abe6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-07-28  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * config/rs6000/ppc-auxv.h (PPC_FEATURE2_DARN): New define.
+       (PPC_FEATURE2_SCV): Likewise.
+       * config/rs6000/rs6000.c (cpu_supports_info): Use them.
+
 2017-07-28  Tamar Christina  <tamar.christina@arm.com>
 
        * config/aarch64/aarch64.c

diff --git a/gcc/config/rs6000/ppc-auxv.h b/gcc/config/rs6000/ppc-auxv.h
index c7e2e0bfbf2cab364492ebeefdad69726e2fe461..dcee28a8152fb5849feb8662934aab5c08c9434e 100644 (file)
--- a/gcc/config/rs6000/ppc-auxv.h
+++ b/gcc/config/rs6000/ppc-auxv.h
@@ -89,6 +89,8 @@
 #define PPC_FEATURE2_HTM_NOSC       0x01000000
 #define PPC_FEATURE2_ARCH_3_00      0x00800000
 #define PPC_FEATURE2_HAS_IEEE128    0x00400000
+#define PPC_FEATURE2_DARN           0x00200000
+#define PPC_FEATURE2_SCV            0x00100000
 
 
 /* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 2fcec13b3f33886049faae61b5d9823765dba295..386a5cebc2f7653d9d386c8d8f7819ff1957243f 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -375,7 +375,9 @@ static const struct
   { "tar",             PPC_FEATURE2_HAS_TAR,           1 },
   { "vcrypto",         PPC_FEATURE2_HAS_VEC_CRYPTO,    1 },
   { "arch_3_00",       PPC_FEATURE2_ARCH_3_00,         1 },
-  { "ieee128",         PPC_FEATURE2_HAS_IEEE128,       1 }
+  { "ieee128",         PPC_FEATURE2_HAS_IEEE128,       1 },
+  { "darn",            PPC_FEATURE2_DARN,              1 },
+  { "scv",             PPC_FEATURE2_SCV,               1 }
 };
 
 /* On PowerPC, we have a limited number of target clones that we care about

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d8d60abd53658ecac18ff8f594ca768abe3abdef..d2682dc70944c10607d5f8d247fac3f291fdda36 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-07-28  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * gcc.target/powerpc/cpu-builtin-1.c (darn, scv): Add tests.
+
 2017-07-28  Tamar Christina  <tamar.christina@arm.com>
 
        * gcc.target/aarch64/int_mov_immediate_1.c: New.

diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
index 1de4b6980af708452af4990ae807b6be32f429e2..c190f246231883a00e4a665d9402fedebdfc270e 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
@@ -71,6 +71,8 @@ use_cpu_supports_builtins (unsigned int *p)
   p[35] = __builtin_cpu_supports ("ucache");
   p[36] = __builtin_cpu_supports ("vcrypto");
   p[37] = __builtin_cpu_supports ("vsx");
+  p[38] = __builtin_cpu_supports ("darn");
+  p[39] = __builtin_cpu_supports ("scv");
 #else
   p[0] = 0;
 #endif