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Added english language description, spaces and brackets for ldx instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:55:08 +0000
(11:55 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:55:08 +0000
(11:55 +0100)
openpower/isa/fixedload.mdwn
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diff --git
a/openpower/isa/fixedload.mdwn
b/openpower/isa/fixedload.mdwn
index e46633fca6e023eb8e47f57ecead190c6754a64c..a87d6332b2c176356cdfe2492c40176e8c90159b 100644
(file)
--- a/
openpower/isa/fixedload.mdwn
+++ b/
openpower/isa/fixedload.mdwn
@@
-520,6
+520,12
@@
Pseudo-code:
EA <- b + (RB)
RT <- MEM(EA, 8)
+Description:
+
+ Let the effective address (EA) be the sum
+ (RA|0)+ (RB). The doubleword in storage addressed by
+ EA is loaded into RT.
+
Special Registers Altered:
None