arch-arm: Move breakpoint/watchpoint check out of the TLB

The breakpoint, watchpoint, vector catch and software step checks
have been moved from the TLB to the SelfDebug class.

This is cleaningup the TLB model which is simply asking the SelfDebug
class if there is a pending debug fault

Change-Id: I1724896b24e4728b32a6b46c5cd51cc6ef279fd7
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31079
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc
index 9a60aab68d5c3cdb51bd2902a2b1cea5b65c1601..96c78226cca6f17560ab0106ee4e42a6fe6aacd1 100644 (file)
--- a/src/arch/arm/self_debug.cc
+++ b/src/arch/arm/self_debug.cc
@@ -44,6 +44,31 @@
 using namespace ArmISA;
 using namespace std;
 
+Fault
+SelfDebug::testDebug(ThreadContext *tc, const RequestPtr &req,
+                     BaseTLB::Mode mode)
+{
+    Fault fault = NoFault;
+
+    if (mode == BaseTLB::Execute) {
+        const bool d_step = softStep->advanceSS(tc);
+        if (!d_step) {
+            fault = testVectorCatch(tc, req->getVaddr(), nullptr);
+            if (fault == NoFault)
+                fault = testBreakPoints(tc, req->getVaddr());
+        }
+    } else if (!req->isCacheMaintenance() ||
+             (req->isCacheInvalidate() && !req->isCacheClean())) {
+        bool md = mode == BaseTLB::Write ? true: false;
+        fault = testWatchPoints(tc, req->getVaddr(), md,
+                                req->isAtomic(),
+                                req->getSize(),
+                                req->isCacheMaintenance());
+    }
+
+    return fault;
+}
+
 Fault
 SelfDebug::testBreakPoints(ThreadContext *tc, Addr vaddr)
 {

diff --git a/src/arch/arm/self_debug.hh b/src/arch/arm/self_debug.hh
index 67654d2d7539e869541e84037808414ec4f4f76f..121ddde4427e0d316c6f254189bda37650eca5cf 100644 (file)
--- a/src/arch/arm/self_debug.hh
+++ b/src/arch/arm/self_debug.hh
@@ -44,6 +44,7 @@
 #include "arch/arm/system.hh"
 #include "arch/arm/types.hh"
 #include "arch/arm/utility.hh"
+#include "arch/generic/tlb.hh"
 #include "cpu/thread_context.hh"
 
 class ThreadContext;
@@ -322,14 +323,19 @@ class SelfDebug
         delete vcExcpt;
     }
 
+    Fault testDebug(ThreadContext *tc, const RequestPtr &req,
+                    BaseTLB::Mode mode);
+
+  protected:
     Fault testBreakPoints(ThreadContext *tc, Addr vaddr);
     Fault testWatchPoints(ThreadContext *tc, Addr vaddr, bool write,
                           bool atomic, unsigned size, bool cm);
-    Fault testVectorCatch(ThreadContext *tc, Addr addr, ArmFault* flt);
 
     Fault triggerException(ThreadContext * tc, Addr vaddr);
     Fault triggerWatchpointException(ThreadContext *tc, Addr vaddr,
                                      bool write, bool cm);
+  public:
+    Fault testVectorCatch(ThreadContext *tc, Addr addr, ArmFault* flt);
 
     inline BrkPoint* getBrkPoint(uint8_t index)
     {

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index f007f9317917c0c902662fe56a1f6ca28ac06a44..db0d55c9726f576e513066e2e5a9c766eb47431a 100644 (file)
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1213,24 +1213,9 @@ TLB::translateFs(const RequestPtr &req, ThreadContext *tc, Mode mode,
     //Check for Debug Exceptions
     if (fault == NoFault) {
         auto *isa = static_cast<ArmISA::ISA *>(tc->getIsaPtr());
-        SelfDebug * sd = isa->getSelfDebug();
-        if (mode == Execute)
-        {
-            const bool d_step = sd->getSstep()->advanceSS(tc);
-            if (!d_step) {
-                fault = sd->testVectorCatch(tc, req->getVaddr(), nullptr);
-                if (fault == NoFault)
-                    fault = sd->testBreakPoints(tc, req->getVaddr());
-            }
-        }
-        else if (!req->isCacheMaintenance() ||
-                 (req->isCacheInvalidate() && !req->isCacheClean())) {
-            bool md = mode == Write ? true: false;
-            fault = sd->testWatchPoints(tc, req->getVaddr(), md,
-                                        req->isAtomic(),
-                                        req->getSize(),
-                                        req->isCacheMaintenance());
-        }
+        SelfDebug *sd = isa->getSelfDebug();
+
+        fault = sd->testDebug(tc, req, mode);
     }
 
     return fault;